stm6601gu2bdm6f STMicroelectronics, stm6601gu2bdm6f Datasheet - Page 9

• Manufacturer Part Number: stm6601gu2bdm6f
• Description: Smart Push-button On/off Controller With Smart Resettm Power-on Lockout
• Manufacturer: STMicroelectronics

STM6600 - STM6601
2
Pin descriptions
V
V
the V
SR - Smart Reset
This input is equipped with voltage detector with a factory-trimmed threshold and has ±8 kV
HBM ESD protection.
Both PB and SR buttons have to be pressed and held for t
recognized and the reset is asserted (or the enable output is deasserted depending on the
option) - see
Active low SR input is usually connected to GND through the momentary push-button (see
Figure
using an external device with either open drain (recommended) or push-pull output. Open
drain output can be connected in parallel with push-button or other open drain outputs,
which is not possible with push-pull output.
V
This 1.5 V voltage reference is specified with very tight accuracy of 1% (see
proper output voltage as soon as the reset output is deasserted (i.e. after t
it is disabled when the device enters standby mode. A mandatory capacitor needs to be
connected to V
recommended.
PS
This input is equipped with a voltage detector with a factory-trimmed threshold. It is used to
confirm correct power-up of the device (if EN or EN is not asserted) or to initiate a shutdown
(if EN or EN is asserted).
Forcing PS
enable output asserted. Because most processors have outputs in high-Z state before
initialization, an internal pull-down resistor is connected to PS
Figure
Forcing the PS
Figure
C
A capacitor to ground determines the additional time (t
pressed and held before a long push is recognized. The connected C
charged with I
the C
ESR capacitor (e.g. ceramic). If the capacitor is not used, leave the C
capacitor is connected, there is no t
expires (see
CC
CC
REF
SRD
HOLD
- power supply input
is monitored during startup and normal operation for sufficient voltage level. Decouple
CC
SRD
- external precise 1.5 V voltage reference
- Smart Reset
1) and it has an optional 100 kΩ pull-up resistor. It is also possible to drive this input
7, 8, 9, 10, 11, 12, 13, and 18).
14). Input voltage on this pin is compared to an accurate voltage reference.
pin from ground by placing a 0.1 µF capacitor as close to the device as possible.
input
capacitor reaches the V
HOLD
Figure 18
Figure
SRD
HOLD
REF
high during power-up confirms the proper start of the application and keeps
™
current. Additional Smart Reset
output (even if V
15, 16, and 17.
signal low during normal operation deasserts the enable output (see
™
button input
delay time input
and 19).
Doc ID 15453 Rev 7
SRD
SRD
REF
voltage threshold. It is recommended to use a low
is not used). Capacitor value of 1 µF is
and a long push is recognized right after t
™
delay time t
SRD
SRD
) that PB with SR must be
HOLD
period so the long push is
SRD
input during startup (see
ends when voltage on
SRD
SRD
capacitor is
pin open. If no
Pin descriptions
REC
Table
expires) and
INT_Min
5). It has
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