emc163sp16k Emlsi Inc., emc163sp16k Datasheet - Page 51
emc163sp16k
Manufacturer Part Number
emc163sp16k
Description
1mx16 Bit Cellularram Ad-mux
Manufacturer
Emlsi Inc.
Datasheet
1.EMC163SP16K.pdf
(52 pages)
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Figure 38: Asynchronous WRITE Followed by Asynchronous READ
Note:
1. When configured for synchronous mode (BCR[15] = 0), CE# must remain HIGH for at least 5ns (
interval. Otherwise,
A/DQ[15:0]
UB#/LB#
A[19:16]
ADV#
WAIT
WE#
OE#
CE#
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
OH
OL
IL
t
CPH is only required after CE#-controlled WRITEs.
t
t
t
AVS
AVS
AS
t
t
AS
Valid Address
Valid Address
AS
t
CVS
t
VP
t
t
t
t
AW
t
t
VS
AW
WP
AVH
AVH
t
t
CW
BW
t
DS
Valid Input
t
DH
High-Z
51
t
CPH
Note 1
t
CVS
t
VP
t
t
AVS
AVS
Valid Address
Valid Address
t
t
AVH
AVH
t
BA
t
t
CPH) to schedule the appropriate refresh
CO
t
AA
1Mx16 CellularRAM AD-MUX
t
V
V
AADV
OH
OL
t
AA
t
OEZ
t
OLZ
Don’t Care
EMC163SP16K
t
OE
V
alid
Output
t
Undefined
t
HZ
HZ
t
BHZ
t
OHZ
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