MC100EL35D ON Semiconductor, MC100EL35D Datasheet - Page 2

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MC100EL35D

Manufacturer Part Number
MC100EL35D
Description
IC FLIP FLOP JK ECL 5V HS 8SOIC
Manufacturer
ON Semiconductor
Series
100ELr
Type
JK Typer
Datasheet

Specifications of MC100EL35D

Function
Reset
Output Type
Differential
Number Of Elements
1
Number Of Bits Per Element
1
Frequency - Clock
2.2GHz
Delay Time - Propagation
525ps
Trigger Type
Positive Edge
Voltage - Supply
4.2 V ~ 5.7 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Current - Output High, Low
-
Other names
MC100EL35DOS

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC100EL35DR2G
Manufacturer:
ON
Quantity:
6 904
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. JEDEC standard multilayer board − 2S2P (2 signal, 2 power)
Table 2. MAXIMUM RATINGS
V
V
V
I
T
T
q
q
q
q
q
T
q
Symbol
out
A
stg
JA
JC
JA
JC
JA
sol
JC
CC
EE
I
Figure 1. Logic Diagram and Pinout Assignment
CLK
K
R
J
PECL Mode Power Supply
NECL Mode Power Supply
PECL Mode Input Voltage
NECL Mode Input Voltage
Output Current
Operating Temperature Range
Storage Temperature Range
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Wave Solder
Thermal Resistance (Junction−to−Case)
1
2
3
4
J
K
Parameter
R
Pb−Free
8
7
6
5
Pb
V
Q
Q
V
CC
EE
http://onsemi.com
V
V
V
V
Continuous
Surge
0 lfpm
500 lfpm
Standard Board
0 lfpm
500 lfpm
Standard Board
0 lfpm
500 lfpm
<2 to 3 sec @ 248°C
<2 to 3 sec @ 260°C
(Note 1)
EE
CC
EE
CC
Condition 1
= 0 V
= 0 V
= 0 V
= 0 V
2
Table 1. PIN DESCRIPTION
Table 1. TRUTH TABLE
J
K
R
CLK
Q, Q
V
V
EP
CC
EE
PIN
J*
H
H
X
L
L
V
V
8 SOIC
8 SOIC
8 SOIC
8 TSSOP
8 TSSOP
8 TSSOP
DFN8
DFN8
DFN8
I
I
 V
 V
Condition 2
CC
EE
ECL Input
ECL Input
ECL Reset
ECL Clock Input
ECL Data Outputs
Positive Supply
Negative Supply
(DFN8 only) Thermal exposed pad must be
connected to a sufficient thermal conduit. Elec-
trically connect to the most negative supply
(GND) or leave unconnected, floating open.
K*
H
H
L
L
X
FUNCTION
R*
H
L
L
L
L
41 to 44 ± 5%
−65 to +150
−40 to +85
41 to 44
35 to 40
Rating
100
190
130
185
140
129
265
265
−8
−6
50
84
8
6
CLK
Z
Z
Z
Z
X
Qn+1
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Qn
Qn
Unit
H
mA
mA
L
L
°C
°C
°C
V
V
V
V

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