tc5747 ETC-unknow, tc5747 Datasheet - Page 26

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tc5747

Manufacturer Part Number
tc5747
Description
Single Chip Cmos Imager With Integrated Image Signal Processor Jpeg Codec
Manufacturer
ETC-unknow
Datasheet
TC5747 Data Sheet
Single Chip CMOS Imager
4.2.4
The
is being written into a device. The polarity is programmable. The data is marked as valid only when the
VALIDV
4.2.5
The CONT unit uses the
frame. When output is disabled, the
data output bus holds the background value throughout the disabled frame time.
The
clock cycle that follows the
VALIDH
c_outframe
pin is active. The data should be sampled on the trailing edge of the
VALIDH Configured as WR#
Frame-Rate Control
pin may be configured to work as a WRITE signal for applications requiring that the video data
signal changes on
c_outframe
im_frame signal
Figure 15: VALIDH as a Write Signal, Active High
Figure 14: VALIDH as a Write signal, Active Low
im_frame
signal to control the frame rate. It enables or disables the output of a full
VALIDH
Figure 16: Frame Rate Control
.
. The decision if to send or skip the new frame is made on the
and
TransChip
VALIDV
20
output signals are stuck at an inactive state. The
VALIDH
pin.

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