MC10EP31DR2G ON Semiconductor, MC10EP31DR2G Datasheet - Page 2

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MC10EP31DR2G

Manufacturer Part Number
MC10EP31DR2G
Description
IC FLIP FLOP ECL SET/RST 8-SOIC
Manufacturer
ON Semiconductor
Series
10EPr
Type
D-Typer
Datasheet

Specifications of MC10EP31DR2G

Function
Set(Preset) and Reset
Output Type
Differential
Number Of Elements
1
Number Of Bits Per Element
1
Frequency - Clock
3GHz
Delay Time - Propagation
340ps
Trigger Type
Positive Edge
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output High, Low
-
RESET
SET
CLK
Figure 1. 8−Lead Pinout (Top View) and
D
1
2
3
4
Table 3. ATTRIBUTES
1. For additional information, see Application Note AND8003/D.
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Flammability Rating
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Logic Diagram
D
Flip Flop
R
S
Characteristics
8
7
6
5
http://onsemi.com
V
Q
Q
V
Oxygen Index: 28 to 34
CC
EE
Charged Device Model
Human Body Model
Machine Model
2
TSSOP−8
Table 1. PIN DESCRIPTION
*Pins will default LOW when left open.
Table 2. TRUTH TABLE
CLK*
Reset*
Set*
D*
Q, Q
V
V
EP
Z = LOW to HIGH Transition
SOIC−8
CC
EE
D
H
X
X
X
L
DFN8
Pin
SET
Pb Pkg
Level 1
Level 1
Level 1
H
H
L
L
L
UL 94 V−0 @ 0.125 in
75 Devices
ECL Clock Inputs
ECL Asynchronous Reset
ECL Asynchronous Set
ECL Data Input
ECL Data Outputs
Positive Supply
Negative Supply
(DFN8 only) Thermal exposed pad must
be connected to a sufficient thermal con-
duit. Electrically connect to the most neg-
ative supply (GND) or leave unconnec-
ted, floating open.
> 200 V
> 4 kV
> 2 kV
Value
75 kW
N/A
RESET
Pb−Free Pkg
H
H
L
L
L
Level 1
Level 3
Level 1
Function
CLK
Z
Z
X
X
X
UNDEF
Q
H
H
L
L

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