pic24hj128gp510at-i-pt Microchip Technology Inc., pic24hj128gp510at-i-pt Datasheet - Page 29
pic24hj128gp510at-i-pt
Manufacturer Part Number
pic24hj128gp510at-i-pt
Description
High-performance, 16-bit Microcontrollers
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC24HJ128GP510AT-I-PT.pdf
(294 pages)
- Current page: 29 of 294
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REGISTER 3-2:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
0’ = Bit is cleared
bit 15-4
bit 3
bit 2
bit 1-0
Note 1: The IPL3 bit is concatenated with the IPL<2:0> bits (SR<7:5>) to form the CPU interrupt priority level.
U-0
U-0
—
—
Unimplemented: Read as ‘0’
IPL3: CPU Interrupt Priority Level Status bit 3
1 = CPU interrupt priority level is greater than 7
0 = CPU interrupt priority level is 7 or less
PSV: Program Space Visibility in Data Space Enable bit
1 = Program space visible in data space
0 = Program space not visible in data space
Unimplemented: Read as ‘0’
U-0
U-0
—
—
CORCON: CORE CONTROL REGISTER
C = Clear only bit
W = Writable bit
‘x = Bit is unknown
PIC24HJXXXGPX06A/X08A/X10A
U-0
U-0
—
—
U-0
U-0
Preliminary
—
—
-n = Value at POR
U = Unimplemented bit, read as ‘0’
(1)
IPL3
R/C-0
U-0
—
(1)
R/W-0
PSV
U-0
—
‘1’ = Bit is set
U-0
U-0
—
—
DS70592A-page 27
U-0
U-0
—
—
bit 8
bit 0
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