Interrupts
Timer Counter
Serial interface
DMA controller
I/O Pins
A/D converter
Special Ports
ROM Correction
Type
Internal ROM type
ROM (byte)
RAM (byte)
Package (Lead-free)
Minimum Instruction
Execution Time
RESET. Watchdog. External 0 to 5. Timer 0 to 6. Timer 7 (2 systems). Time base. Serial 0 reception. Serial 0 transmission. Serial 1
reception. Serial 1 transmission. Serial 2. Serial 3. Automatic transfer finish. A/D conversion finish. Key interrupts (8 lines)
8-bit timer × 7
16-bit timer × 1
Time base timer: One-minute count setting
Watchdog timer × 1
Synchronous type/UART (full-duplex) × 2: Serial 0, 1
Synchronous type × 1: Serial 2
Synchronous type/Single-master I
Maximum transfer cycles: 255
Starting factor: External request. Various types of interrupt. Software
Transfer mode: 1-byte transfer. Word transfer. Burst transfer
I/O
Input
10-bit × 6 channels (with S/H)
Buzzer output. Remote control carrier output. High-current drive port
Correcting address designation: Up to 3 addresses possible
MN101C61 Series
Timer 0 ..................Square-wave/8-bit PWM output. Event count. Remote control carrier output. Pulse width measurement
Timer 1 ..................Square-wave output. Event count. Synchronous output event
Timer 2 ..................Square-wave/8-bit PWM output. Event count. Synchronous output event. Pulse width measurement
Timer 3 ..................Square-wave output. Event count. Remote control carrier output
Timer 4 ..................Square-wave/8-bit PWM output. Event count. Pulse width measurement. Serial 1 baud rate timer
Timer 5 ..................Square-wave/8-bit PWM output. Event count. Pulse width measurement. Serial 0 baud rate timer
Timer 6 ..................8-bit freerun timer
Timer 0, 1 can be cascade-connected
Timer 2, 3 can be cascade-connected
Timer 7 ..................Square-wave/16-bit PWM output (cycle/duty continuous variable). Event count. Synchronous output event. Pulse
62 : Common use. Specified pull-up resistor available. Input/output selectable (bit unit)
6 : Common use. Specified pull-up resistor available
width measurement. Input capture
*: The operation guarantee range for flash memory built-in type is 2.2 V to 3.0 V (MN101CF60G) or 2.7 V
2
MN101C61D
C × 1: Serial 3
64K
3K
Mask ROM
MN101C61G
62.5 µs (at 1.8 V to 3.6 V, 32 kHz)*
125 µs (at 1.8 V to 3.6 V, 32 kHz)*
0.1 µs (at 2.5 V to 3.6 V, 20 MHz)
0.2 µs (at 2.1 V to 3.6 V, 10 MHz)
0.5 µs (at 1.8 V to 3.6 V, 4 MHz)*
0.1 µs (at 2.5 V to 3.6 V, 10 MHz)
0.5 µs (at 1.8 V to 3.6 V, 2 MHz)*
0.2 µs (at 2.1 V to 3.6 V, 5 MHz)
to 3.6 V (MN101CF61G).
TQFP080-P-1212D
[Double speed]
[Standard]
MN101CF60G
128K
12K
FLASH
MN101CF61G
MAD00009JEM