mb95f118bwpv2 Fujitsu Microelectronics, Inc., mb95f118bwpv2 Datasheet - Page 38

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mb95f118bwpv2

Manufacturer Part Number
mb95f118bwpv2
Description
8-bit Proprietary Microcontrollers
Manufacturer
Fujitsu Microelectronics, Inc.
Datasheet
38
MB95110B Series
(2) Source Clock/Machine Clock
*1 : Clock before setting division due to machine clock division ratio selection bit (SYCC : DIV1 and DIV0) . This
*
Source clock*
division)
Source clock frequency
Machine clock*
execution time)
Machine clock
frequency
2
(Clock before setting
(Minimum instruction
: Operation clock of the microcontroller. Machine clock can be selected as follow.
source clock is divided by the machine clock division ratio selection bit (SYCC : DIV1 and DIV0) , and it becomes
the machine clock. Further, the source clock can be selected as follow.
• Main clock divided by 2
• PLL multiplication of main clock (select from 1, 2, 2.5 4 multiplication)
• Sub clock divided by 2
• PLL multiplication of sub clock (select from 2, 3, 4 multiplication)
• Source clock (no division)
• Source clock divided by 4
• Source clock divided by 8
• Source clock divided by 16
Parameter
1
2
Sym-
t
t
F
F
F
bol
F
MCLK
SCLK
MPL
SPL
MP
SP
name
Pin
16.38
0.031
1.024
61.5
Min
100
7.6
0.5
7.6
4
Value
Typ
131.072 kHz When using Sub clock
131.072 kHz When using Sub clock
(Vcc = 3.3 V, AVss = Vss = 0.0 V, T
16.250 MHz When using Main clock
32000
16.25
976.5
2000
Max
61.0
MHz When using Main clock
Unit
ns
µs
ns
µs
When using Main clock
Min : F
Max : F
When using Sub clock
Min : F
Max : F
When using Main clock
Min : F
Max : F
When using Sub clock
Min : F
Max : F
CH
CL
SP
SPL
CH
CL
SP
SPL
= 32 kHz, PLL multiplied by 4
= 16.25 MHz, no division
= 8.125 MHz, PLL multiplied by 2
= 32 kHz, divided by 2
= 0.5 MHz, divided by 16
= 1 MHz, divided by 2
= 131 kHz, no division
= 16 kHz, divided by 16
Remarks
A
= − 40 °C to + 85 °C)

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