ep9315 Cirrus Logic, Inc., ep9315 Datasheet - Page 57

• Manufacturer Part Number: ep9315
• Description: Enhanced Universal Platform System-on-chip Processor
• Manufacturer: Cirrus Logic, Inc.

W P[12]
M AD[7]
G
Y HSYNC
V
U AD[0]
T
R AD[2]
P
N DA[13]
L DA[18]
K AD[22]
H
F
E AD[23]
D AD[24]
C CSN[1] CSN[3] AD[20] DA[29]
B CSN[2] DA[31] DA[30] DA[27]
A CSN[7] DA[28] AD[18]
J DA[21]
SDCSN[
SDCSN[
DQMN[
DA[8]
AD[4]
P[16]
3]
0]
3]
1
1
SDCSN[
DQMN[
BLANK
DA[10]
DA[12] DA[11]
DA[14]
DA[17] DA[16] DA[15]
DA[20] AD[21] DA[19]
DA[22] DA[24] AD[25]
DA[23] DA[26] CSN[6]
DA[25] DD[11]
CASN
DD[1]
AD[1]
P[15]
P[11]
P[9]
0]
1]
2
2
DQMN[
DD[12]
SDWE
RASN
DD[0]
DA[9] BRIGHT RVDD
AD[6]
P[10]
P[13]
P[17]
P[8]
1]
N
3
3
DQMN[2
SDCSN[
SPCLK
SDCLK
SDCLK
DD[15]
AD[3]
AD[5]
DD[8]
P[14]
P[2]
P[5]
P[7]
EN
2]
4
4
]
V_CSY
DD[13]
DD[10] DD[6] DD[2] MDC
AD[15] DA[6] DA[4]
AD[19] DD[9] DD[5]
RVDD
CVDD
CVDD
RVDD
CVDD
RVDD
RVDD GND
DD[7] DD[3] WRN MDIO
DD[4]
GND
GND
GND
P[3]
P[6]
NC
5
5
DA[7] DA[5]
DD[1
GND
AD[1
RVD
RVD
CVD
RVD
P[1]
P[4] P[0]
4]
7]
6
D
D
D
D
6
AD[1
GND
GND
CVD
CVD
RDN
4]
D
D
7
7
AD[10
AD[11
AD[12
AD[13
AD[16
RXCL
CVD
CVD
GND
GND
GND
GND
GND
GND
CVD
D
D
D
K
8
8
]
]
]
]
]
MIIRXD[
MIIRXD[
MIIRXD[
MIIRXD[
RVDD
RVDD
DA[1]
AD[9]
DA[2]
DA[3]
GND
GND
GND
GND
GND
GND
2]
3]
1]
0]
9
9
Figure 40. 352 PIN BGA PINOUT
IDECS1
IDECS0
MIITXD[
RXERR
RXDVA
TXCLK
AD[8]
DA[0]
GND
GND
GND
GND
GND
GND
GND
GND
10
10
3]
N
N
L
MIITXD[
MIITXD[
MIITXD[
IDEDA[
IDEDA[
IDEDA[
DSRN BOOT[1]
TXEN
GND
GND
GND
GND
GND
GND
GND
GND
11
11
0]
1]
2]
0]
1]
2]
READY
MCWAI
TXERR
RVDD
RVDD
DTRN
GND
GND
GND
GND
GND
GND
CRS
TCK
TDI
TN
12
12
MCDAE
CVDD
CVDD
CVDD
MCD2
GND
GND
GND
GND
GND
GND
GND
TDO
TMS
CLD
VS1
NC
NN
13
13
BOOT[0] EEDAT
SSPRX1 INT[1]
MCADE
EECLK
ASYNC SSPTX1 INT[2]
MCDIR MCELN IORDN MCWRN USBP[2] IORDY DMACKN C
CVDD
CVDD
MCD1
GND
GND
VS2
NN
14
14
MCBVD
MCBVD
EGPIO[
SCLK1 GRLED
RVDD
RVDD
RVDD
INT[0]
GND
GND
GND
14]
15
15
2
1
USBM[1
MCEHN
MCREG
PWMO
ASDO
RVDD
CVDD
CVDD
CVDD
RVDD
RVDD
RVDD EGPIO[7]
GND
GND
GND
ASDI
WP
UT
16
16
N
]
EGPIO[2]
USBM[0] RXD[1]
RTCXTA
RTCXTA
USBM[2] ARSTN DIORN EGPIO[1] D
EGPIO[1
EGPIO[1
ROW[0] ROW[3]
DIOWN
SFRM1 RDLED USBP[1] ABITCLK Y
RXD[0]
XTALO
COL[4]
COL[5]
INT[3]
RTSN
XTALI
SYM
LO
17
17
LI
3]
2]
USBP[0] CTSN
PLL_VD
MCRDN WAITN
EGPIO[
ADC_V
EGPIO[
EGPIO[
EGPIO[
TXD[2] ROW[2]
COL[0]
COL[3]
COL[7] RSTON
SLA[1]
SYP
XM
DD
15]
18
18
D
9]
4]
0]
EGPIO[1
EGPIO[6
EGPIO[3
PLL_GN
ROW[6]
ADC_G
IOWRN
TXD[1]
COL[1]
COL[6]
SLA[0]
SXM
ND
YP
19
19
D
0]
]
]
EGPIO[11
EGPIO[8] F
EGPIO[5] E
MCRESE
ROW[1] U
ROW[4] T
ROW[5] R
ROW[7] P
PRSTN
TRSTN B
RXD[2] W
COL[2]
CSN[0] M
TXD[0]
SXP
YM
20
XP
TN
20
]
V
N
K
H
G
A
L
J