str712 STMicroelectronics, str712 Datasheet - Page 60

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str712

Manufacturer Part Number
str712
Description
144/64-pin Arm7tdmi Mcu With Up To 256kb Flash, 64kb Ram And Emi
Manufacturer
STMicroelectronics
Datasheet

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Electrical parameters
4.3.8
Note:
60/78
Figure 31. Write cycle timing: 16-bit write on 8-bit memory
Figure 32. Write cycle timing: 32-bit write on 8-bit memory
I
Subject to general operating conditions for V
The STR7 I
protocol described in the following table with the restriction mentioned below:
Restriction: The I/O pins which SDA and SCL are mapped to are not “True” Open-Drain:
when configured as open-drain, the PMOS connected between the I/O pin and V
disabled, but it is still present. Also, there is a protection diode between the I/O pin and V
Consequently, when using this I
the STR7X while some another I
STR7X will be powered by the protection diode.
Refer to I/O port characteristics for more details on the input/output alternate function
characteristics (SDA and SCL).
2
RDn
CSn.x
WEn.x
D[7:0]
(Output)
A[23:0]
C - inter IC control interface
RDn
CSn.x
WEn.x
D[7:0]
(Output)
A[23:0]
See
2
C interface meets the requirements of the Standard I
Table 35
t
WAS
address
t
WAS
for write timing data.
t
WP
Data Output
t
WDS1
t
WAH
address
t
WAT
t
t
WWT
WDH
2
t
2
WP
C in a multi-master network, it is not possible to power off
C master node remains powered on: otherwise, the
Data Output
t
WDS1
address
t
WAH
t
WP
Data Output
t
WDS2
t
WAT
t
WAH
t
t
WWT
WDH
t
WAT
33
t
t
WWT
WDH
, f
PCLK1
address
address
t
t
WP
WP
Data Output
Data Output
t
WDS2
, and T
t
WDS2
t
WAH
t
WAH
t
WAT
t
t
WWT
WDH
A
t
t
WCR
WDH
unless otherwise specified.
address
2
t
WP
C communications
Data Output
t
WDS2
t
WAH
t
t
WCR
WDH
33
STR71xF
is
33
.

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