c8051f544 Silicon Laboratories, c8051f544 Datasheet - Page 128

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c8051f544

Manufacturer Part Number
c8051f544
Description
Mixed Signal Isp Flash Mcu Family
Manufacturer
Silicon Laboratories
Datasheet

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C8051F54x
SFR Definition 15.1. PCON: Power Control
SFR Address = 0x87; SFR Page = All Pages
128
Name
Reset
7:2
Bit
Type
1
0
Bit
GF[5:0]
Name
STOP
IDLE
7
0
General Purpose Flags 5–0.
These are general purpose flags for use under software control.
Stop Mode Select.
Setting this bit will place the CIP-51 in Stop mode. This bit will always be read as 0.
1: CPU goes into Stop mode (internal oscillator stopped).
Idle Mode Select.
Setting this bit will place the CIP-51 in Idle mode. This bit will always be read as 0.
1: CPU goes into Idle mode. (Shuts off clock to CPU, but clock to Timers, Interrupts,
Serial Ports, and Analog Peripherals are still active.)
6
0
5
0
GF[5:0]
R/W
Rev. 1.0
4
0
Function
3
0
2
0
STOP
R/W
1
0
IDLE
R/W
0
0

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