c8051f410 Silicon Laboratories, c8051f410 Datasheet - Page 77
c8051f410
Manufacturer Part Number
c8051f410
Description
2.0 V, 32/16 Kb Flash, Smartclock, 12-bit Adc
Manufacturer
Silicon Laboratories
Datasheet
1.C8051F410.pdf
(270 pages)
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C8051F410/1/2/3
7.
Voltage Reference
The Voltage reference MUX on C8051F41x devices is configurable to use an externally connected voltage
reference, the internal reference voltage generator, or the V
power supply voltage (see Figure 7.1). The
DD
REFSL bit in the Reference Control register (REF0CN) selects the reference source. For an external
source or the internal reference, REFSL should be set to ‘0’. To use V
as the reference source, REFSL
DD
should be set to ‘1’.
The internal voltage reference circuit consists of a temperature stable bandgap voltage reference genera-
tor and a gain-of-two output buffer amplifier. The output voltage is selected between 1.5 V and 2.2 V. The
internal voltage reference can be driven out on the V
pin by setting the REFBE bit in register REF0CN
REF
to a ‘1’ (see Figure 7.1). The load seen by the V
pin must draw less than 200 µA to GND. When using
REF
the internal voltage reference, bypass capacitors of 0.1 µF and 4.7 µF are recommended from the V
REF
pin to GND. If the internal reference is not used, the REFBE bit should be cleared to ‘0’.
The BIASE bit enables the internal voltage bias generator, which is used by the ADC, Temperature Sensor,
internal oscillators, and IDACs. This bit is forced to logic 1 when any of the aforementioned peripherals are
enabled. The bias generator may be enabled manually by writing a ‘1’ to the BIASE bit in register
REF0CN; see SFR Definition 7.1 for REF0CN register details.
The electrical specifications for the voltage reference circuit are given in Table 7.1.
REFLV
Figure 7.1. Voltage Reference Functional Block Diagram
Rev. 1.0
77
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