cop87l88rd National Semiconductor Corporation, cop87l88rd Datasheet - Page 5

• Manufacturer Part Number: cop87l88rd
• Description: 8-bit Cmos Otp Microcontrollers With 16k Or 32k Memory And 8-channel A/d With Prescaler
• Manufacturer: National Semiconductor Corporation

Instruction Cycle Time (t
CKI Clock Duty Cycle (Note 9)
Inputs
Output Propagation Delay (Note 8)
MICROWIRE
MICROWIRE Hold Time (t
MICROWIRE Output Propagation Delay (t
Input Pulse Width (Note 9)
Reset Pulse Width
AC Electrical Characteristics
−40˚C
Note 2: t
Note 3: Maximum rate of voltage change must be
Note 4: Supply and IDLE currents are measured with CKI driven with a square wave Oscillator, CKO driven 180˚ out of phase with CKI, inputs connected to V
and outputs driven low but not connected to a load.
Note 5: The HALT mode will stop CKI from oscillating in the RC and the Crystal configurations by bringing CKI high. Measurement of I
neither sourcing nor sinking current; with L, C, G0, and G2–G5 programmed as low outputs and not driving a load; all outputs programmed low and not driving a load;
all inputs tied to V
CKI during HALT in crystal clock mode.
Note 6: The user must guarantee that D2 pin does not source more than 10 mA during RESET. If D2 sources more than 10 mA during reset, the device will go into
programming mode.
Note 7: Pins G6 and RESET are designed with a high voltage input network. These pins allow input voltages
biased at voltages
pins will not latch up. The voltage at the pins must be limited to
ESD transients.
Note 8: The output propagation delay is referenced to the end of the instruction cycle where the output change occurs.
Note 9: Parameter characterized but not tested.
Crystal, Resonator,
R/C Oscillator
Rise Time (Note 9)
Fall Time (Note 9)
t
t
t
SO, SK
All Others
Interrupt Input High Time
Interrupt Input Low Time
Timer 1, 2, 3 Input High Time
Timer 1, 2, 3 Input Low Time
SETUP
HOLD
PD1
, t
PD0
c
= Instruction Cycle Time
T
A
™
CC
+85˚C unless otherwise specified
Setup Time (t
>
; clock monitor and comparator disabled. Parameter refers to HALT mode entered via setting bit 7 of the G Port data register. Part will pull up
V
Parameter
CC
(the pins do not have source current when biased at a voltage below V
c
)
UWH
UWS
) (Note 9)
) (Note 9)
<
UPD
0.5 V/ms.
)
<
14V. WARNING: Voltages in excess of 14V will cause damage to the pins. This warning excludes
4.5V
4.5V
f
f
f
4.5V
4.5V
R
4.5V
4.5V
r
r
r
L
= Max
= 10 MHz Ext Clock
= 10 MHz Ext Clock
= 2.2k, C
V
V
V
V
V
V
Conditions
CC
CC
CC
CC
CC
CC
5
L
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
= 100 pF
CC
). The effective resistance to V
>
Min
200
1.0
3.0
1.0
1.0
1.0
1.0
1.0
V
40
60
20
56
CC
and the pins will have sink current to V
Typ
CC
DD
is 750
HALT is done with device
Max
220
DC
DC
0.7
1.0
60
5
5
(typical). These two
www.national.com
CC
Units
µs
µs
ns
ns
ns
ns
µs
µs
ns
ns
ns
µs
%
t
t
t
t
when
c
c
c
c
CC