mb91101 Fujitsu Microelectronics, Inc., mb91101 Datasheet - Page 8

• Manufacturer Part Number: mb91101
• Description: 32-bit Risc Microcontroller Cmos
• Manufacturer: Fujitsu Microelectronics, Inc.

8
MB91101/MB91101A
*1: FPT-100P-M05
*2: FPT-100P-M06
16 to 18
LQFP*
95,
92
91
14
13
12
94
89
1
2
3
Pin no.
1
19 to 21
QFP*
98,
95
94
17
16
15
97
92
4
5
6
2
Pin name
DREQ2
DACK2
MD0 to
CS1H
CS1L
INT0,
DW1
INT1
PE0,
INT2
MD2
RST
HST
SC1
PB5
PB6
PB7
NMI
PE1
PE2
X0
X1
Circuit
type
G
H
H
F
F
F
A
A
B
F
F
CASL output for DRAM bank 1
Refer to the DRAM interface for details.
Can be configured as a port when CS1L and DREQ2 are not used.
External transfer request input pin for DMA
This pin is used for input when external trigger is selected to cause
DMAC operation, and it is necessary to disable output for other
functions from this pin unless such output is made intentionally.
CASH output for DRAM bank 1
Refer to the DRAM interface for details.
Can be configured as a port when CS1H and DACK2 are not used.
External transfer request acknowledge output pin for DMAC (ch. 2)
This function is available when transfer request output for DMAC is
enabled.
WE output for DRAM bank 1 (“L” active)
Refer to the DRAM interface for details.
Can be configured as a port when DW1 is not used.
Mode pins 0 to 2
MCU basic operation mode is set by these pins.
Directly connect these pins with V
Clock (oscillator) input
Clock (oscillator) output
External reset input
Hardware standby input (“L” active)
NMI (non-maskable interrupt pin) input (“L” active)
External interrupt request input pins
These pins are used for input during corresponding interrupt is en-
abled, and it is necessary to disable output for other functions from
these pins unless such output is made intentionally.
Can be configured as I/O ports when INT0, INT1 are not used.
External interrupt request input pin
This pin is used for input during corresponding interrupt is enabled,
and it is necessary to disable output for other functions from this pin
unless such output is made intentionally.
Clock I/O pin for UART1
Clock output is available when clock output of UART1 is enabled.
Can be configured as the I/O port when INT2 and SC1 are not used.
This function is available when UART1 clock output is disabled.
Description
CC
or V
SS
for use.
(Continued)