ep7311 Cirrus Logic, Inc., ep7311 Datasheet - Page 11

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ep7311

Manufacturer Part Number
ep7311
Description
Ep7311 Data Sheet
Manufacturer
Cirrus Logic, Inc.
Datasheet

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Pin Multiplexing
The following table shows the pin multiplexing of the MCP,
SSI2 and the CODEC. The selection between SSI2 and the
CODEC is controlled by the state of the SERSEL bit in
SYSCON2. The choice between the SSI2, CODEC, and the
MCP is controlled by the MCPSEL bit in SYSCON3 (see the
EP73xx User’s Manual for more information).
DS506F1
SSICLK
SSITXDA
SSIRXDA
SSITXFR
SSIRXFR
BUZ
Mnemonic
Pin
Table R. MCP/SSI2/CODEC Pin Multiplexing
I/O
I/O
I/O
O
O
I
I
SIBDOUT
SIBSYNC
SIBCLK
SIBDIN
MCP
p/u
SSITXDA
SSIRXDA
SSITXFR
SSIRXFR
SSICLK
SSI2
©
Copyright Cirrus Logic, Inc. 2005
PCMSYNC
PCMOUT
CODEC
PCMCLK
PCMIN
(All Rights Reserved)
p/u
The following table shows the pins that have been multiplexed
in the EP7311.
nMOE
nMWE
WRITE
A[27:15]
A[14:13]
PD[7:6]
RUN
nMEDCHG
PD[0]
PE[1:0]
PE[2]
Signal
High-Performance, Low-Power System on Chip
Static Memory
Static Memory
Static Memory
Static Memory
Static Memory
GPIO
System
Configuration
Interrupt
Controller
GPIO
GPIO
GPIO
Table S. Pin Multiplexing
Block
nSDCAS
nSDWE
nSDRAS
DRA[0:12]
DRA[13:14]
SDQM[1:0]
CLKEN
nBROM
LEDFLSH
BOOTSEL[1:0]
CLKSEL
Signal
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
System
Configuration
Boot ROM
select
LED Flasher
System
Configuration
System
Configuration
Block
EP7311
11

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