w78c31b Winbond Electronics Corp America, w78c31b Datasheet - Page 5

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w78c31b

Manufacturer Part Number
w78c31b
Description
8-bit Microcontroller
Manufacturer
Winbond Electronics Corp America
Datasheet

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W78C31B
FUNCTION DESCRIPTION
The W78C31B architecture consists of a core controller surrounded by various registers, four general
purpose I/O ports, 128 bytes of RAM, two timer/counters, and a serial port. The processor supports
111 different instructions and references both a 64K program address space and a 64K data storage
space.
Timers 0, 1
Timers 0, 1, each consist of two 8-bit data registers. These are called TL0 and TH0 for Timer 0, TL1
and TH1 for Timer 1. The TCON and TMOD registers provide control functions for timers 0, 1.
Clock
The W78C31B is designed to be used with either a crystal oscillator or an external clock. Internally,
the clock is divided by two before it is used. This makes the W78C31B relatively insensitive to duty
cycle variations in the clock.
Crystal Oscillator
The W78C31B incorporates a built-in crystal oscillator. To make the oscillator work, a crystal must be
connected across pins XTAL1 and XTAL2. In addition, a load capacitor must be connected from each
pin to ground, and a resistor must also be connected from XTAL1 to XTAL2 to provide a DC bias
when the crystal frequency is above 24 MHz.
External Clock
An external clock should be connected to pin XTAL1. Pin XTAL2 should be left unconnected. The
XTAL1 input is a CMOS-type input, as required by the crystal oscillator. As a result, the external clock
signal should have an input one level of greater than 3.5 volts.
Power Management
Idle Mode
The idle mode is entered by setting the IDL bit in the PCON register. In the idle mode, the internal
clock to the processor is stopped. The peripherals and the interrupt logic continue to be clocked. The
processor will exit idle mode when either an interrupt or a reset occurs.
Power-Down Mode
When the PD bit of the PCON register is set, the processor enters the power-down mode. In this
mode all of the clocks, including the oscillator are stopped. The only way to exit power-down mode is
by a reset.
Reset
The external RESET signal is sampled at S5P2. To take effect, it must be held high for at least two
machine cycles while the oscillator is running.
An internal trigger circuit in the reset line is used to deglitch the reset line when the W78C31B is used
with an external RC network. The reset logic also has a special glitch removal circuit that ignores
glitches on the reset line.
Publication Release Date: October 1997
- 5 -
Revision A3

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