xc6101a123 TOREX SEMICONDUCTOR LTD., xc6101a123 Datasheet - Page 9

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xc6101a123

Manufacturer Part Number
xc6101a123
Description
Voltage Detector
Manufacturer
TOREX SEMICONDUCTOR LTD.
Datasheet
■OPERATIONAL EXPLANATION
The XC6101~XC6107, XC6111~XC6117 series compare, using the amplifier, the voltage of the internal voltage reference
source with the voltage divided by R1, R2 and R3 connected to the V
amplifier activates the watchdog logic, manual reset logic, delay circuit and the output driver. When the V
gradually falls and finally reaches the detect voltage, the RESETB pin output goes from high to low in the case of the V
ICs, and the RESET pin output goes from low to high in the case of the V
<RESETB / RESET Pin Output Signal>
* V
The RESETB pin output goes from high to low whenever the V
MRB pin is driven from high to low. The RESETB pin remains low for the release delay time (T
reaches the release voltage. If neither rising nor falling signals are applied to the WD pin within the watchdog timeout period,
the RESETB pin output remains low for the release delay time (T
* V
The RESET pin output goes from low to high whenever the V
MRB pin is driven from high to low. The RESET pin remains high for the release delay time (T
reaches the release voltage. If neither rising nor falling signals are applied to the WD pin within the watchdog timeout period,
the V
<Hysteresis>
When the internal comparator output is high, the N-Channel transistor connected in parallel to R3 is turned ON, activating the
hysteresis circuit. The difference between the release and detect voltages represents the hysteresis width, as shown by the
following calculations:
Hysteresis width is selectable from V
<Watchdog (WD) Pin>
The XC6101~XC6107, XC6111~XC6117 series use a watchdog timer to detect malfunction or “runaway” of the
microprocessor. If neither rising nor falling signals are applied from the microprocessor within the watchdog timeout period,
the RESETB/RESET pin output maintains the detection state for the release delay time (T
RESET/RESETB pin output returns to the release state (Please refer to the FUNCTION CHART). The timer in the watchdog
is then restarted. Six watchdog timeout period settings are available in 1.6s, 400ms, 200ms, 100ms, 50ms, 6.25ms.
<MRB Pin>
Using the MRB voltage pin input, the RESET/RESETB pin signal can be forced to the detection state. When the MRB pin is
driven from high to low, the RESETB pin output goes from high to low level signal in the case of the V
RESET pin output goes from low to high in the case of the V
RESET/RESETB pin output maintains the detection state for the release delay time (T
pulled up to the V
which is an input protection element, is connected between the MRB pin and V
voltage that exceeds V
(V
<Release Delay Time>
Release delay time (T
timeout period expires with no rising signal applied to the WD pin, until the RESET/RESETB pin output is released from the
detection state. Seven release delay time (T
100ms, 50ms, 25ms, 3.13ms.
<Detect Delay Time>
Detect Delay Time (T
RESETB pin output goes into the detection state.
SS
DFL
DFH
-0.3∼V
V
V
V
V
OUT
* Detect voltage (V
* Please refer to the block diagrams for R1, R2, R3 and Vref.
DF
DR
HYS
DR
(RESETB) type - output signal: Low when detected.
(RESET) type – output signal: High when detected.
(detect voltage) = (R1+R2+R3) x Vref(R2+R3)
(release voltage) = (R1+R2) x Vref(R2)
> V
pin output remains high for the release delay time (T
(hysteresis width)=V
IN
DF
+0.3≦7.0V) on the MRB pin.
IN
pin voltage level, leave the MRB pin open if unused (Please refer to the FUNCTION CHART). A diode,
DF
DR
IN
) is the time that elapses from when the V
DF
, the current will flow to V
) is the time that elapses from when the V
) includes conditions of both V
DR
-V
DF
DF
(V)
x 0.05V (XC6101~XC6107) or V
DR
IN
) watchdog timeout period settings are available in 1.6s, 400ms, 200ms,
through the diode. Please use this IC within the stated maximum ratings
DFL
(low when detected) and V
DR
IN
IN
DFH
), and thereafter the RESET pin outputs low level signal.
DR
pin voltage falls below the detect voltage, or whenever the
pin voltage falls below the detect voltage, or whenever the
IN
), and thereafter the RESET pin outputs high level signal.
IN
type. Even after the MRB pin is driven back high, the
pin reaches the release voltage, or when the watchdog
pin voltage falls to the detect voltage until the RESET/
DF
DFH
IN
x 0.001V (XC6111~XC6117).
XC6101 ~ XC6107, XC6111~ XC6117
pin. The resulting output signal from the error
type ICs.
IN
pin. Therefore, if the MRB pin is applied
DFH
DR
). Since the MRB pin is internally
(high when detected).
DR
DR
) after the V
) after the V
DR
), and thereafter the
DFL
type ICs, and the
IN
IN
IN
pin voltage
pin voltage
pin voltage
DFL
Series
9/27
type

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