s-1009c15s Seiko Instruments Inc., s-1009c15s Datasheet - Page 17

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s-1009c15s

Manufacturer Part Number
s-1009c15s
Description
Super-low Current Consumption Super High-accuracy Voltage Detector With Delay Circuit External Delay Time Setting
Manufacturer
Seiko Instruments Inc.
Datasheet
Rev.4.0
SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
2. Hysteresis width (V
3. Delay Time (t
4. Through-type current
5. Oscillation
The hysteresis width is the voltage difference between the detection voltage and the release voltage (The voltage at
point B − The voltage at point A = V
and the release voltage, prevents malfunction caused by noise on the input voltage.
The delay time in the S-1009 Series is a period from the input voltage to the V
(+V
Through-type current is a current that flows instantaneously at the time of detection and release of a voltage
detector. The through-type current is large in CMOS output products, small in Nch open drain output products.
In applications where a resistor is connected to the voltage detector input (Figure 21), taking a CMOS active “L”
product for example, the through-type current which is generated when the output goes from “L” to “H” (release)
causes a voltage drop equal to [through-type current] × [input resistance] across the resistor. When the input
voltage drops below the detection voltage (−V
through-type current stops and its resultant voltage drop disappears, and the output goes from “L” to “H”. The
through-type current is then generated again, a voltage drop appears, and repeating the process finally induces
oscillation.
DET
_00
) until the output from the OUT pin inverts. The delay time changes according to the external capacitor (C
Figure 21 An example for bad implementation due to detection voltage change
D
)
HYS
+V
)
DET
V
VDD
VSS
HYS
R
R
A
B
in Figure 14). Setting the hysteresis width between the detection voltage
Figure 20 Delay time
Seiko Instruments Inc.
V
DET
IN
) as a result, the output voltage goes to low level. In this state, the
S-1009C
t
V
D
DD
OUT
OUT
DD
pin exceeding the release voltage
S-1009 Series
D
).
17

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