ak5701 AKM Semiconductor, Inc., ak5701 Datasheet - Page 27

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ak5701

Manufacturer Part Number
ak5701
Description
16-bit ?? Stereo Adc With Pll & Mic-amp
Manufacturer
AKM Semiconductor, Inc.
Datasheet

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The AK5701 becomes EXT Master Mode by setting as
PLL circuit is not operated. The clock required to operate is MCKI (256fs, 512fs or 1024fs). The input frequency of
MCKI is selected by FS1-0 bits
MCKI should always be present whenever the ADC is in operation (PMADL bit = “1” or PMADR bit = “1”). If MCKI is
not provided, the AK5701 may draw excess current and it is not possible to operate properly because utilizes dynamic
refreshed logic internally. If MCKI is not present, the ADC should be in the power-down mode (PMADL=PMADR bits
= “0”).
MS0404-E-02
EXT Master Mode (PMPLL bit = “0”, M/S bit = “1”, TE3-0 bits = “0101”, TMASTER bit = “1”)
Mode
0
1
2
3
FS3-2 bits
Table 13. BCLK Output Frequency at Master Mode (N/A: Not available)
x
x
x
x
Table 12. MCKI Frequency at EXT Master Mode (x: Don’t care)
BCKO1 bit
(Table
AK5701
0
0
1
1
FS1 bit
MCKO
MCKI
BCLK
LRCK
SDTO
12).
0
0
1
1
Figure 23. EXT Master Mode
BCKO0 bit
FS0 bit
0
1
0
1
256fs, 512fs or 1024fs
0
1
0
1
Figure 49
32fs or 64fs
- 27 -
1fs
MCKI Input
BCLK Output
Frequency
Frequency
. Master clock is input from the MCKI pin, the internal
1024fs
256fs
512fs
256fs
N/A
32fs
64fs
N/A
MCLK
BCLK
LRCK
SDTI
DSP or μP
Sampling Frequency
7.35kHz ∼ 48kHz
7.35kHz ∼ 13kHz
7.35kHz ∼ 26kHz
7.35kHz ∼ 48kHz
(default)
Range
(default)
[AK5701]
2007/08

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