ak4373 ETC-unknow, ak4373 Datasheet - Page 33

• Manufacturer Part Number: ak4373
• Description: Low Power Stereo Dac With Hp/spk-amp
• Manufacturer: ETC-unknow

■
A reference clock of PLL is selected among the input clocks to the MCKI, BICK or LRCK pin. The required clock to the
AK4373 is generated by an internal PLL circuit. Input frequency is selected by PLL3-0 bits
a) PLL reference clock: MCKI pin
BICK and LRCK inputs must be synchronized with MCKO output. The phase between MCKO and LRCK is not
important. The MCKO pin outputs the frequency selected by PS1-0 bits
bit. Sampling frequency can be selected by FS3-0 bits
MS0991-E-00
PLL Slave Mode (PMPLL bit = “1”, M/S bit = “0”)
Figure 25. PLL Slave Mode 1 (PLL Reference Clock: MCKI pin)
AK4373
MCKI
MCKO
BICK
LRCK
SDTI
256fs/128fs/64fs/32fs
(Table
≥ 32fs
1fs
- 33 -
6).
11.2896MHz, 12MHz, 12.288MHz
13.5MHz, 24MHz, 25MHz, 27MHz
MCLK
BCLK
LRCK
SDTO
(Table
DSP or μP
10) and the output is enabled by MCKO
(Table
5).
[AK4373]
2008/09