71m6545h-igtr/f Maxim Integrated Products, Inc., 71m6545h-igtr/f Datasheet - Page 129
71m6545h-igtr/f
Manufacturer Part Number
71m6545h-igtr/f
Description
Metrology Processors
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.71M6545H-IGTRF.pdf
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PDS_6545_009
6.8.2 71M6545/H Analog Pins
Table 99
equivalent circuit, as specified in 6.8.4.
v1.0
No.
Pin
57
56
44
43
42
41
40
39
54
53
52
58
48
49
Name
IADC0
IADC1
IADC2
IADC3
IADC4
IADC5
IADC6
IADC7
VADC8 (VA)
VADC9 (VB)
VADC10 (VC)
VREF
XIN
XOUT
lists the analog pins. Pin types: O = Output, I = Input. The circuit number denotes the
Type
O
O
I
I
I
© 2008–2011 Teridian Semiconductor Corporation
Circuit
Table 99: 71M6545/H Analog Pins
6
6
9
8
Differential or single-ended Analog Line Current Sense Inputs:
These pins are voltage inputs to the internal A/D converter.
Typically, they are connected to the outputs of current
sensors. Unused pins must be tied to V3P3A.
When configured as differential inputs (i.e., by setting the
DIFFx_E control bits, where x=0, 2, 4, 6), pins are paired to form
differential inputs pairs: IADC0-IADC1, IADC2-IADC3, IADC4-
IADC5, and IADC6-IADC7.
IADC2-IADC3, IADC4-IADC5 and IADC6-IADC7 may be
configured for communication with the 71M6xx3 remote
isolated sensor interface (i.e., by setting the RMTx_E control
bits, where x=2, 4, 6). When configured as remote sensor
interfaces, these pins form balanced digital pairs for bi-
directional digital communications with a 71M6xx3 remote
isolated sensor.
Line Voltage Sense Inputs: These pins are voltage inputs to
the internal A/D converter. Typically, they are connected to
the outputs of resistor dividers. Unused pins must be tied to
V3P3A.
Voltage Reference for the ADC. This pin must be left
unconnected (floating). The VREF pin must be kept turned off
for normal operation (see VREF_CAL, I/O RAM 0x2704[7]).
Crystal Inputs: A 32 kHz crystal should be connected across
these pins. Typically, a 15 pF capacitor is also connected
from XIN to GNDA and a 10 pF capacitor is connected from
XOUT to GNDA. It is important to minimize the capacitance
between these pins. See the crystal manufacturer datasheet for
details. If an external clock is used, a 150 mV (p-p) clock
signal should be applied to XIN, and XOUT should be left
unconnected.
Description
Data Sheet 71M6545/H
129
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