ICS83940-02 Integrated Circuit System, ICS83940-02 Datasheet - Page 13

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ICS83940-02

Manufacturer Part Number
ICS83940-02
Description
Manufacturer
Integrated Circuit System
Datasheet
83940AY-02
Figure 8 shows how the differential input can be wired to accept single ended levels. The reference voltage V_REF ~ V
generated by the bias resistors R1, R2 and C1. This bias circuit should be located as close as possible to the input pin. The ratio of
R1 and R2 might need to be adjusted to position the V_REF in the center of the input voltage swing. For example, if the input clock
swing is only 2.5V and V
W
IRING THE
CC
= 3.3V, V_REF should be 1.25V and R2/R1 = 0.609.
F
IGURE
D
IFFERENTIAL
8 - S
A
CLK_IN
PPLICATION
www.icst.com/products/hiperclocks.html
INGLE
PRELIMINARY
0.1uF
C1
E
NDED
I
NPUT TO
S
IGNAL
R1
1K
V_REF
R2
1K
13
D
I
NFORMATION
IFFERENTIAL
A
D
V
CCEPT
RIVING
DD
+
-
D
IFFERENTIAL
S
INGLE
-
TO
-LVCMOS F
E
I
NPUT
NDED
L
ICS83940-02
L
OW
EVELS
REV. A SEPTEMBER 24, 2001
S
ANOUT
KEW
, 1-
B
TO
UFFER
CC
-18
/2 is

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