wm8326 Wolfson Microelectronics plc, wm8326 Datasheet - Page 13

• Manufacturer Part Number: wm8326
• Description: Processor Power Management Subsystem
• Manufacturer: Wolfson Microelectronics plc

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POWER STATES
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For production use, the WM8326 the on-chip non volatile memory is typically used, in which the
essential parameters for starting up the device can be programmed. This allows the WM8326 to start
up and shut down the system with no dependency on any other devices for application-specific
configuration parameters. The WM8326 can be supplied unprogrammed or with the customer’s
system configuration data pre-programmed. Note that there is an alternate flow whereby the device
can program itself with data from an external EEPROM when on the PCB.
The WM8326 has 6 main power states, which are described below. Different levels of functionality
are associated with each of the power states. Some of the state transitions are made autonomously
by the WM8326 (eg. transitions to/from BACKUP are scheduled according to the available power
supply conditions). Other transitions are initiated as a result of instructions issued over the Control
Interface or as a result of software functions (eg. Watchdog timer) or hardware functions such as the
ON
NO POWER - This is the device state when no power is available. All functions are disabled and all
register data is lost.
OFF - This is the device state when power is available but the device is switched off. The RTC is
enabled and the register map contents are maintained. The RESET
LDO11 may optionally be enabled in this state; all other DC-DCs and LDOs are disabled (except
LDO12 and LDO13, which support internal functions). The backup battery charger is disabled in this
state.
ON - This is the normal operating state when the device is switched on. All device functions are
available in this state.
SLEEP - This is a user-configurable operating state which is intended for a low-power operating
condition. Selected functions may be enabled, disabled or re-configured according to the user’s
requirements. A programmable configuration sequence for the DC-DCs and LDOs is executed on
transition to/from SLEEP mode.
BACKUP - This is the operating state when the PVDD power supply is below the reset threshold of
the device. Typically, this means that the PVDD supply has been removed. All DC-DC converters
and LDO regulators are disabled in this state. The RTC and oscillator and a ‘software scratch’
memory area can be maintained from the backup battery (if available) in this state. All other functions
and registers are reset in BACKUP. (Note that, for power saving, an ‘unclocked’ mode, in which the
RTC is held constant, may be selected if required.)
PROGRAM - This is a special operating state which is used for programming the integrated OTP
memory with the device configuration data. The settings stored in the OTP define the device
configuration in the ON state, and also the time/sequencing data associated with ON/OFF power
state transitions.
The valid power state transitions are illustrated in Figure 2.
¯ ¯ pin. The valid transitions and the associated conditions are detailed below.
¯ ¯ ¯ ¯ ¯ ¯ pin is pulled low in this state.
Product Brief, October 2010, Rev 1.0
WM8326
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