wm8352 Wolfson Microelectronics plc, wm8352 Datasheet - Page 210

• Manufacturer Part Number: wm8352
• Description: Wolfson Audioplus? Stereo Codec With Power Management
• Manufacturer: Wolfson Microelectronics plc

WM8352
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R26 (1Ah) Interrupt Status 2
R28 (1Ch) Under Voltage Interrupt
R29 (1Dh) Over Current Interrupt
R30 (1Eh) GPIO Interrupt Status
R17 (11h) RTC Hours/Day
R18 (12h) RTC Date/Month
R19 (13h) RTC Year
R20 (14h) Alarm Seconds/Minutes
R21 (15h) Alarm Hours/Day
R22 (16h) Alarm Date/Month
R23 (17h) RTC Time Control
R24 (18h) System Interrupts
R25 (19h) Interrupt Status 1
R31 (1Fh) Comparator Interrupt
R32 (20h) System Interrupts Mask
R33 (21h) Interrupt Status 1 Mask
R34 (22h) Interrupt Status 2 Mask
R36 (24h) Under Voltage Interrupt
R37 (25h) Over Current Interrupt
REG
status
status
Status
status Mask
status Mask
NAME
_HOT_EINT
OC_LS_EIN
IM_OC_LS_
CHG_BATT
EXT_USB_
IM_CHG_B
ATT_HOT_
RTC_BCD RTC_12HR
FB_EINT
EINT (s)
EINT (s)
15
0
0
0
0
0
0
0
0
0
T
0
0
0
0
CHG_BATT
_COLD_EIN
EXT_WALL
IM_CHG_B
ATT_COLD
_FB_EINT
_EINT (s)
14
T
0
0
0
0
0
0
0
0
0
0
0
0
0
0
EXT_BATT_
CHG_BATT
_FAIL_EINT
IM_OC_INT
IM_CHG_B
ATT_FAIL_
IM_CS1_EI
CS1_EINT
FB_EINT
EINT (s)
OC_INT
NT (s)
(Ms)
13
0
0
0
0
0
0
0
0
0
0
CHG_TO_EI
GP12_EINT GP11_EINT GP10_EINT GP9_EINT
IM_UV_INT
IM_CHG_T
O_EINT (s)
IM_CS2_EI
CS2_EINT
UV_INT
NT (s)
(Ms)
12
NT
0
0
0
0
0
0
0
0
RTC_ALMMINS[6:0]
CHG_END_
CODEC_JC
K_DET_L_E
IM_UV_LDO
UV_LDO4_
IM_CHG_E
4_EINT (s)
RTC_YHUNDREDS[5:0]
RTC_SET
ND_EINT
EINT
EINT
11
INT
(s)
0
0
0
0
0
0
0
RTC_ALMMTH[4:0]
RTC_MTH[4:0]
IM_UV_LDO
CHG_STAR
CODEC_JC
TART_EINT
USB_LIMIT
UV_LDO3_
K_DET_R_
IM_CHG_S
IM_USB_LI
3_EINT (s)
RTC_STS RTC_ALMS
MIT_EINT
T_EINT
_EINT
RTC_ALMDAY[3:0]
EINT
EINT
10
(s)
(s)
0
0
0
0
RTC_DAY[2:0]
CSCD_EINT
IM_UV_LDO
CHG_FAST
_RDY_EINT
UV_LDO2_
CODEC_MI
IM_CS_INT
IM_CHG_F
AST_RDY_
2_EINT (s)
CS_INT
EINT (s)
EINT
(Ms)
9
ET
0
0
0
0
ATARDY_EI
IM_UV_LDO
RTC_ALMS
AUXADC_D
CODEC_MI
IM_EXT_IN
C_DATARD
UV_LDO1_
IM_AUXAD
Y_EINT (s)
GP8_EINT
1_EINT (s)
EXT_INT
CD_EINT
T (Ms)
EINT
8
TS
NT
0
0
0
0
AUXADC_D
IM_RTC_PE
C_DCOMP4
CODEC_IN
RTC_PER_
IM_CODEC
IM_AUXAD
COMP4_EI
GP7_EINT
R_EINT (s)
_INT (Ms)
_EINT (s)
EINT
NT
7
0
0
0
0
0
0
T
0
0
0
0
0
AUXADC_D
WKUP_OFF
IM_RTC_SE
C_DCOMP3
RTC_SEC_
COMP3_EI
_STATE_EI
IM_GP_INT
IM_AUXAD
GP6_EINT
C_EINT (s)
_EINT (s)
GP_INT
EINT
(Ms)
6
NT
NT
0
0
0
0
0
0
0
0
RTC_PINT[2:0]
IM_UV_DC6
RTC_ALMH
AUXADC_D
UV_DC6_EI
_STATE_EI
IM_RTC_AL
C_DCOMP2
AUXADC_I
RTC_ALM_
COMP2_EI
WKUP_HIB
IM_AUXAD
C_INT (Ms)
M_EINT (s)
IM_AUXAD
RTC_HPM
GP5_EINT
_EINT (s)
_EINT (s)
EINT
PM
5
NT
NT
NT
NT
0
0
NV_FAULT_
C_DCOMP1
IM_UV_DC5
AUXADC_D
UV_DC5_EI
IM_RTC_IN
COMP1_EI
WKUP_CO
IM_AUXAD
GP4_EINT
RTC_INT
_EINT (s)
_EINT (s)
T (Ms)
EINT
RTC_YUNITS[7:0]
4
NT
NT
0
0
0
0
RTC_ALMSECS[6:0]
OG_RST_EI
IM_SYS_HY
IM_UV_DC4
SYS_HYST
_COMP_FA
UV_DC4_EI
WKUP_WD
IM_SYS_IN
ST_COMP_
FAIL_EINT
GP3_EINT
_EINT (s)
SYS_INT
IL_EINT
RTC_ALMDATE[5:0]
T (Ms)
NT
3
NT
(s)
RTC_DATE[5:0]
0
0
0
0
RTC_ALMHRS[4:0]
RTC_HRS[4:0]
CHG_VBAT
SYS_CHIP_
UV_DC3_EI
WKUP_GP_
PWR_ON_E
IM_CHG_IN
BATT_LT_3
P9_EINT (s)
IM_UV_DC3
T_LT_3P9_
GT115_EIN
IM_CHG_V
HIP_GT115
GP2_EINT
IM_SYS_C
CHG_INT
_EINT (s)
_EINT (s)
T (Ms)
EINT
INT
NT
2
RTC_DSW[3:0]
T
0
0
CHG_VBAT
SYS_CHIP_
UV_DC2_EI
BATT_LT_3
P1_EINT (s)
IM_UV_DC2
T_LT_3P1_
GT140_EIN
WKUP_ON
IM_USB_IN
IM_CHG_V
HIP_GT140
GP1_EINT
KEY_EINT
IM_SYS_C
USB_INT
_EINT (s)
_EINT (s)
T (Ms)
EINT
1
NT
T
0
0
PD, June 2009, Rev 4.1
G_TO_EINT
WKUP_GP_
WAKEUP_E
IM_UV_DC1
CHG_VBAT
UV_DC1_EI
IM_WKUP_I
BATT_LT_2
DOG_TO_E
WKUP_INT
T_LT_2P85
SYS_WDO
IM_CHG_V
IM_SYS_W
GP0_EINT
P85_EINT
_EINT (s)
NT (Ms)
INT (s)
_EINT
INT
0
NT
(s)
Production Data
0
0
DEFAULT
3FFFh
0100h
0101h
1400h
0000h
0000h
0000h
0320h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
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