isppac-powr1014 Lattice Semiconductor Corp., isppac-powr1014 Datasheet - Page 24

• Manufacturer Part Number: isppac-powr1014
• Description: In-system Programmable Power Supply Supervisor, Reset Generator And Sequencing Controller
• Manufacturer: Lattice Semiconductor Corp.

Lattice Semiconductor
col, as well as SMBTimeout and SMBAlert features of the SMBus, enabling it to easily integrated into many types
of modern power management systems. Figure 2-15 shows a typical I
PAC-POWR1014As are slaved to a supervisory microcontroller. SDA is used to carry data signals, while SCL pro-
vides a synchronous clock signal. The SMBAlert line is only present in SMBus systems. The 7-bit I
the POWR1014A is fully programmable through the JTAG port.
Figure 2-15. ispPAC-POWR1014A in I
In both the I
ter device generates the SCL clock signal and coordinates all data transfers to and from a number of slave devices.
The ispPAC-POWR1014A is configured as a slave device, and cannot independently coordinate data transfers.
Each slave device on a given I
addressing portion of the standard. Any 7-bit address can be assigned to the ispPAC-POWR1014A device by pro-
gramming through JTAG. When selecting a device address, one should note that several addresses are reserved
by the I
compatibility. Table 2-6 lists these reserved addresses.
Table 2-6. I
The ispPAC-POWR1014A’s I
write transaction (Figure 2-16) consists of the following operations:
2
C and/or SMBus standards, and should not be assigned to ispPAC-POWR1014A devices to assure bus
SDA
2
V+
2
C/SMBus Reserved Slave Device Addresses
C and SMBus protocols, the bus is controlled by a single MASTER device at any given time. This mas-
0000 000
0000 000
0000 001
0000 010
0000 011
0001 000
0001 100
0101 000
0110 111
1100 001
Address
0000 1xx
1111 0xx
1111 1xx
MICROPROCESSOR
(I
2
SCL
C MASTER)
INTERRUPT
R/W bit
2
C/SMBus interface allows data to be both written to and read from the device. A data
2
C bus is assigned a unique address. The ispPAC-POWR1014A implements the 7-bit
0
1
x
x
x
x
x
x
x
x
x
x
x
SDA/SMDAT (DATA)
SCL/SMCLK (CLOCK)
SMBALERT
General Call Address
Start Byte
CBUS Address
Reserved
Reserved
HS-mode master code
NA
NA
NA
NA
NA
10-bit addressing
Reserved
2
C/SMBUS System
I
2
C function Description
SDA
POWR1014A
(I
2-24
2
C SLAVE)
SCL
OUT5/
SMBA
General Call Address
Start Byte
CBUS Address
Reserved
Reserved
HS-mode master code
SMBus Host
SMBus Alert Response Address
Reserved for ACCESS.bus
Reserved for ACCESS.bus
SMBus Device Default Address
10-bit addressing
Reserved
2
ispPAC-POWR1014/A Data Sheet
C configuration, in which one or more isp-
SMBus Function
SDA
POWR1014A
(I
2
C SLAVE)
SCL
OUT5/
SMBA
To Other
2
Devices
C address of
I
2
C