isppac80 Lattice Semiconductor Corp., isppac80 Datasheet
isppac80
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isppac80 Summary of contents
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... Ref & Auto-Cal ENSPI 7 GND 8 Description The ispPAC80 is a member of the Lattice family of In-System Programmable analog circuits, digitally configured via non- 2 volatile E CMOS technology. Analog building blocks, called PACell™(s), replace traditional analog components such as opamps, eliminating the need for external resistors and capacitors. With no requirement for ...
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... IL V Input High Voltage Input Leakage Current Output Low Voltage (TDO Output High Voltage (TDO) OH Specifications ispPAC80 Condition Applied to Either IN IN+ – IN -40 to +85° 10kHz, Referred to Input Present at Either ...
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... Although many hundreds of thousands of filter configurations are available using ispPAC80, not every type will have corner frequencies available from exactly 50kHz to 500kHz, depending on the tables available from within PAC- Designer filter design tools. The general specifications given under this heading are realized using the Elliptic filter types. Support for filter types with corner frequencies from 500kHz to 750kHz is limited to the Butterworth family, as found in the filter database in PAC-Designer ...
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... Note: Stresses above those listed may cause permanent damage to the device. These are stress only ratings and functional operation of the device at these or at any other conditions above those indicated in the operational sec- tions of this specification is not implied. ispPAC80 Ordering Information Ordering Number ispPAC80-01PI ispPAC80-01SI Specifications ispPAC80 ...
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... JTAG write command is issued (less than 2ms later, though the write cycle must still be maintained for a full 80ms to achieve specified data retention). Specifications ispPAC80 Condition Executed in Run-Test/Idle ...
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... TDO Float to Valid Delay tdov TDO Valid Delay tdoxz TDO Valid to Float Delay tckmin TCK CS tdis tdih TDI tdozx tdov TDO hi-z Condition tckh tckl tcss tcsminhi tdoxz hi-z 6 Specifications ispPAC80 Min. Typ. Max. 200 100 100 Units ...
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... OUT- 3. When the signal input is single-ended, the other half of the unused differential input must be connected common-mode reference (usually V Specifications ispPAC80 Description Serial interface logic mode select pin (input). JTAG interface mode only. Serial interface logic clock pin (input). JTAG interface mode only. ...
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... Frequency (Hz) 50 kHz Corner Freq. Error 200 Units Elliptical filter PDIP Pkg cc051042 -2.5 -2 -1.5 -1 -0.5 0 0.5 1 1.5 2 2.5 Corner Frequency Error (%) Specifications ispPAC80 CMR vs. Frequency 90 Elliptical filter 80 cc051042 Fc = 50kHz Elliptical filter cc051042 Fc = 500kHz 100 1k 10k 100k ...
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... Elliptic family of filters. The next set of numbers, “05” refers to the order of the filter. In the case of ispPAC80 this will always be fifth order. The next two digits signify the reflection coefficient (rf), in this case 10%, and has a direct mathematical relationship to the ...
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... Depending on the corner frequency, the frequency range bit is automati- cally set from within PAC-Designer to optimize the transfer function response of the ispPAC80. Exists for both the A and B user strings. Can be overridden from within PAC-Designer from the edit symbol dialog. These are uncommitted E2 bits that can be used to store device information for future reference ...
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... DC current raises the minimum allowable load impedance. Input Common-Mode Voltage Range For the ispPAC80, both maximum input signal range and corresponding common-mode voltage range are a func- tion of the input gain setting. The maximum input voltage times the gain of an individual PACblock cannot exceed the output range of that block or clipping will occur ...
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... PAC-Designer environment. Full device programming is supported using PC parallel port I/O operations and a download cable connected to the serial programming interface of the ispPAC80. A database of filter configura- tions is included with thousands of possible implementations to choose from. In addition, compre- hensive on-line and printed documentation is provided that covers all aspects of PAC-Designer operation ...
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... There is also a user-positioned crosshair cursor that intersects the curves on the plot, and reads out the gain and frequency in the lower right hand corner of the plot window when activated. Tools Options Window Help 10K 100K 10K 100K Curve:1 Vout1/Vin1 13 Specifications ispPAC80 1M 10M 1M 10M ...
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... Included in the basic ispPAC80 Design Kit is an engineer- ing prototype board that can be connected to the parallel port of a PC. It demonstrates proper layout techniques for the ispPAC80 and can be used in real time to check circuit operation as part of the design process. Input and output connections as well as a “breadboard” circuit area are provided to speed debugging of the circuit ...
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... The optional identification register described in IEEE 1149.1 is also included in the ispPAC80. One additional data register included in the TAP of the ispPAC80 is the Lattice defined user register. Figure 5 shows how the instruction and various data registers are placed in an ispPAC80. ...
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... In addition, there are several proprietary instructions that allow the device to be configured and verified. For ispPAC80, the instruction word length is 5- bits. All ispPAC80 instructions available to users are shown in Table 5. BYPASS is one of the three required instructions. It ...
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... Sample/preload. Default to BYPASS. BYPASS 11111 Bypass (connect TDI to TDO). ispPAC80. The bit code of this instruction is defined to be all ones by the IEEE 1149.1 standard. The required SAMPLE/PRELOAD instruction dictates the Boundary-Scan Register be connected between TDI and TDO. The ispPAC80 has no boundary-scan register, so for compatibility it defaults to the BYPASS mode when- ever this instruction is received ...
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... Table 5. VERA and VERB (verify user are the next Lattice instructions and cause the current configurations of the ispPAC80 to be loaded into the user register. This operation doesn’t interrupt operation of the device. The current configuration of either the configuration memory can then be shifted out of the user register immediately after an ADDUSR instruction is executed ...
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... BSC (Dimensions in millimeters, shown in parenthesis, are for reference only) .292 (7.42) .299 (7.59) .050 (1.27) BSC .402 (10.21) .412 (10.46) Specifications ispPAC80 16-Pin Plastic PDIP Dimensions in Inches MIN./MAX. .240 / .260 (6.10 / 6.60) .195 (4.95) MAX .015 (.38) MIN .125 / .135 (3.17 / 3.43) .055 /.065 (1 ...