Features
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Applications
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-G indicates package is RoHS compliant (‘Green’)
Absolute Maximum Ratings
Ordering Information
Parameter
Drain-to-source voltage
Drain-to-gate voltage
Gate-to-source voltage
Operating and storage temperature
Soldering temperature*
Absolute Maximum Ratings are those values beyond which damage to
the device may occur. Functional operation under these conditions is not
implied. Continuous operation of the device at the absolute rating level
may affect device reliability. All voltages are referenced to device ground.
* Distance of 1.6 mm from case for 10 seconds.
Low threshold
High input impedance
Low input capacitance
Fast switching speeds
Low on-resistance
Free from secondary breakdown
Low input and output leakage
Complementary N- and P-channel devices
Logic level interfaces
Solid state relays
Linear amplifi ers
Power management
Analog switches
Telecom switches
TP2435
Device
TO-243AA (SOT-89)
Package Option
TP2435N8-G
P-Channel Enhancement Mode
Vertical DMOS FETs
-55°C to +150°C
300°C
Value
BV
BV
±20V
DGS
DSS
BV
DSS
-350
General Description
This low threshold enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and with the high input
impedance and positive temperature coeffi cient inherent
in MOS devices. Characteristic of all MOS structures,
this device is free from thermal runaway and thermally-
induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide
range of switching and amplifying applications where very
low threshold voltage, high breakdown voltage, high input
impedance, low input capacitance, and fast switching
speeds are desired.
(V)
Pin Confi guration
Product Marking
/BV
DGS
TP4SW
TO-243AA (SOT-89) (N8)
TO-243AA (SOT-89) (N8)
R
(max)
DS(ON)
(Ω)
15
W = Code for week sealed
DRAIN
GATE
= “Green” Packaging
DRAIN
V
(max)
-2.4
GS(th)
(V)
SOURCE
TP2435
I
(min)
-800
(mA)
D(ON)