en5330 Enpirion, en5330 Datasheet - Page 8

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en5330

Manufacturer Part Number
en5330
Description
3a Voltage Mode Synchronous Buck Pwm Dc-dc Converter With Integrated Inductor
Manufacturer
Enpirion
Datasheet

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July 2007
Table 1: Output Voltage Select Table
*NOTE The VS0, VS1 and VS2 pins are defaulted to a ‘1’
with an internal pull-up resistor. Only connect these pins to
AGND if a ‘0’ is required. If a ‘1’ is required, then leave the
pin floating.
Capacitor Selection
The EN5330 needs about 20-40uF of input
capacitance.
capacitors must be used as input capacitors for
this converter and it is required that they be rated
X5R or X7R. In some applications, lower value
capacitors are needed in parallel with the larger,
lossy capacitors in order to provide high
frequency decoupling.
The EN5330 has been optimized for use with
about 50µF of ceramic output capacitance. It is
required that these be low-cost, low-ESR,
ceramic capacitors rated X5R or X7R. (See the
Enpirion application note on ripple comparison
for optimum selection of number and value of
these capacitors based on ripple requirements.)
In order to eliminate high-frequency switching
spikes on the output ripple, usually a low-value,
low-ESR ceramic capacitor is used in parallel
with the larger capacitors right at the load.
Enable Operation
The ENABLE pin provides a means to shut down
the power FET switching or enable normal
operation. A logic low will disable the converter
and cause it to shut down. A logic high will
enable the converter into normal operation.
©Enpirion 2007 all rights reserved, E&OE
VS2*
** 0.8V ref only, not guaranteed performance
0
0
0
0
1
1
1
1
VS1*
Low-cost,
0
0
1
1
0
0
1
1
VS0*
0
1
0
1
0
1
0
1
low-ESR
Output Voltage
User Selectable
0.8V**
1.25V
3.3V
2.5V
1.8V
1.5V
1.2V
ceramic
8
Soft-Start Operation
The SS pin in conjunction with a small capacitor
between this pin and AGND provides the soft
start function to limit the in-rush current during
start-up. During start-up of the converter the
reference voltage to the error amplifier is
gradually increased to its final level by an internal
current source of typically 10uA. This capacitor
begins to charge when ENAB LE and AVIN cross
their turn-on thresholds. The typical soft-start
time for the output to reach regulation voltage
from when C
Where the soft-start time t
start capacitance C
capacitor around 15 nF is recommended.
During the soft-start cycle, when the soft-start
capacitor reaches 0.8V, the output has reached
its programmed regulation range. Note that the
soft-start current source will continue to operate
and during normal operation, the soft-start
capacitor will charge up to a final value of 2.5V.
Power Up Sequencing
The sequencing of AVIN, PVIN and ENABLE
should meet the following requirements:
Note that tying AVIN, PVIN and ENABLE
together and brought up at the same time does
meet these requirements.
POK Operation
The POK signal is an open drain signal indicating
the output voltage is within the specified range.
The POK signal will be a logic high when the
output voltage is within 90% - 120% of the
programmed output voltage. If the output voltage
goes outside of this range, the POK signal will be
a logic low until the output voltage has returned
to within this range. In the event of an over-
1. ENABLE should not be asserted before PVIN.
2. PVIN should not be applied before AVIN.
ss
begins to charge is given by:
t
SS
= C
SS
SS
is in nF. Typically, a
* 0.080
SS
is in ms and the soft-
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