en5310 Enpirion, en5310 Datasheet - Page 7

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en5310

Manufacturer Part Number
en5310
Description
1a Voltage Mode Synchronous Buck Pwm Dc-dc Converter With Integrated Inductor
Manufacturer
Enpirion
Datasheet

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Rev 1.01 – November 2006
Capacitor Selection
The EN5310 needs about 10-20uF of input
capacitance.
capacitors must be used as input capacitors for
this converter and it is required that they be rated
X5R or X7R. In some applications, lower value
capacitors are needed in parallel with the larger,
lossy capacitors in order to provide high
frequency decoupling.
The EN5310 has been optimized for use with
about 20µF of ceramic output capacitance. It is
required that these be low-cost, low-ESR,
ceramic capacitors rated X5R or X7R. (See the
Enpirion application note on ripple comparison
for optimum selection of number and value of
these capacitors based on ripple requirements.)
In order to eliminate high-frequency switching
spikes on the output ripple, usually a low-value,
low-ESR ceramic capacitor is used in parallel
with the larger capacitors right at the load.
Enable Operation
The ENABLE pin provides a means to shut down
the power FET switching or enable normal
operation. A logic low will disable the converter
and cause it to shut down. A logic high will
enable the converter into normal operation.
Soft-Start Operation
The SS pin in conjunction with a small capacitor
between this pin and AGND provides the soft
start function to limit the in-rush current during
start-up. During start-up of the converter the
reference voltage to the error amplifier is
gradually increased to its final level by an internal
current source of typically 10uA. The whole soft-
start procedure is designed to take 1ms - 3ms
with a 15-30nF soft start capacitor, but can be
programmed by capacitor selection using the
following equation:
Rise Time: T
Low-cost,
R
= C
ss
low-ESR
*80k
ceramic
7
POK Operation
The POK signal is an open drain signal from the
converter indicating the output voltage is within
the specified range. The POK signal will be a
logic high when the output voltage is within 90% -
120% of the programmed output voltage. If the
output voltage goes outside of this range, the
POK signal will be a logic low until the output
voltage has returned to within this range. In the
event of an over-voltage condition the POK
signal will go low and will remain in this condition
until the output voltage has dropped to 95% of
the programmed output voltage before returning
to the high state (see also Over Voltage
Protection)
Over-Current Protection
The cycle-by-cycle current limit function is
achieved by sensing the current flowing through
the sense P-MOSFET and a signal generated by
a differential amplifier with a preset over-current
threshold. During a particular cycle, if the over-
current threshold is exceeded, the power P-
MOSFET is turned off and the power N-MOSFET
is turned on to protect the P-MOSFET. If the
over-current condition is removed, the over-
current protection circuit will enable the PWM
operation. If the over-current condition persists,
the converter will eventually go through a full
soft-start cycle. This circuit is designed to provide
high noise immunity.
It is possible to adjust the over-current set point
by connecting a resistor between ROCP and
GND
(increase the trip point) or PVIN (decrease the
trip point). The voltage at the ROCP pin is
designed to be 0.8V. (see application note for
details)
Over-Voltage Protection
When the output voltage exceeds 120% of the
programmed output voltage, the PWM operation
stops, the lower N-MOSFET is turned on and the
POK signal goes low. When the output voltage
drops below 95% of the programmed output
voltage, normal PWM operation resumes and
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