ep5352q Enpirion, ep5352q Datasheet - Page 8

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ep5352q

Manufacturer Part Number
ep5352q
Description
500/600/800ma Synchronous Buck Regulators With Integrated Inductor
Manufacturer
Enpirion
Datasheet
March 2007
Under Voltage Lockout
During initial power up
lo
circuitry until the input voltage reaches a
sufficient level to insure proper operation. If
the voltage drops below the UVLO threshold
the lockout circuitry will again disable the
switching.
chattering between states.
Enable
The ENA
d
operation. A logic low will disable the converter
Application Information
Output Voltage Select
T
choosing output voltage, the EP53x2Q family
uses a 3 pin VID, or Voltage ID, output voltage
select arrangement. This allows the designer
to choose one of seven preset voltages, or to
use an external voltage divider. Internally, the
output of the VID multiplexer sets the value for
the voltage reference DAC, which in turn is
connected to the non-inverting input of the
error amplifier. This allows the use of a single
feedback divider with constant loop gain and
optimum compensation, independent of the
output voltage selected.
T
states and the associated output voltage
levels. A logic “1” indicates a connection to V
or to a “high” logic voltage level. A logic “0”
indicates a connection to ground or to a “low”
logic voltage level. These pins can be either
hardwired to V
driven by standard logic levels. Logic low is
defined as V
as V
values is indeterminate. These pins must not
be left floating.
©Enpirion 2007 all rights reserved, E&OE
own
o provide the highest degree of flexibility in
able 1 shows the various VS0-VS2 pin logic
ckout circuit will hold-off the switching
HIGH
the
≥ 1.4V. Any level between these two
BLE pin provides a means to shut
Hysteresis is included to prevent
LOW
converter
IN
or GND or alternatively can be
≤ 0.4V. Logic high is defined
or
an under voltage
enable
normal
IN
8
Ta
and cause it to shut down. A logic high will
enable the converter into normal operation. In
shutdown mode, the device quiescent current
will be less than 1 uA. The ENABLE pin must
not be left floating.
Thermal Shutdown
W
chip, the junction temperature rises. Once the
junction temperature exceeds the thermal
shutdown temperature the thermal shutdown
circuit turns off the converter output voltage
thus allowing the device to cool. When the
junction temperature decreases by 15C°, the
device will go through the normal startup
process.
VS2
0
0
0
0
1
1
1
1
External Voltage Divider
As described above, the external voltage
divider option is chosen by
V
The EP53x2Q uses a separate feedback pin,
V
must be connected to V
Figure 5.
ble 1. Voltage select settings.
S0, VS1, and VS2 pins to V or logic “high”.
FB
hen excessive power is dissipated in the
, when using the external divider. VSENSE
VS1
0
0
1
1
0
0
1
1
EP5382Q/EP5362Q/EP5352Q
VS0
0
1
0
1
0
1
0
1
OUT
www.enpirion.com
IN
as indicated in
connecting the
V
3.3
2.5
2.8
1.2
3.0
1.8
2.7
External
OUT

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