a54sx16p Actel Corporation, a54sx16p Datasheet - Page 26
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a54sx16p
Manufacturer Part Number
a54sx16p
Description
Sx Family Fpgas
Manufacturer
Actel Corporation
Datasheet
1.A54SX16P.pdf
(64 pages)
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Figure 1-13 • Output Buffer Delays
Figure 1-14 • AC Test Loads
Figure 1-15 • Input Buffer Delays
1 -2 2
SX Family FPGAs
To Output
Under Test
propagation delay)
(used to measure
Out
V
In
In
Out
GND
OL
PAD
Load 1
t
50%
DLH
1.5 V
t
INY
V
CC
50%
1.5 V
3 V
V
OH
1.5 V
35 pF
INBUF
V
50%
CC
t
DHL
GND
t
INY
1.5 V
0 V
Y
To Output
Under Test
50%
Out
En
D
(used to measure
enable delays)
TRIBUFF
V
t
CC
50%
V
ENZL
Load 2
CC
E
V
50%
CC
1.5 V
V
R to V
R to GND for t
R = 1 kΩ
GND
v3.2
OL
35 pF
Figure 1-16 • C-Cell Delays
t
CC
PAD
ENLZ
GND
for t
To AC Test Loads (shown below)
10%
PLZ
PHZ
S, A ,or B
To Output
Under Test
GND
Out
Out
GND
Out
En
50%
t
PD
t
50%
t
PD
ENZH
V
50%
CC
50%
50%
(used to measure
V
V CC
disable delays)
CC
1.5 V
V
50%
V
CC
OH
t PD
Load 2
GND
t
PD
t
S
A
B
GND
ENHZ
GND
R to V CC for t
R to GND for t
R = 1 kΩ
GND
50%
35 pF
50%
Y
90%
V
CC
PLZ
PHZ