le24l042cs Sanyo Semiconductor Corporation, le24l042cs Datasheet - Page 7

• Manufacturer Part Number: le24l042cs
• Description: Wire Serial Interface Eeprom
• Manufacturer: Sanyo Semiconductor Corporation

SDA
6 EEPROM write operation
6-1. Byte writing
6-2. Page writing
6-3. Acknowledge polling
SDA
When the EEPROM receives the 7-bit device address and write command code “0” after the start condition, it
generates an acknowledge signal. After this, if it receives the 8-bit word address, generates an acknowledge signal,
receives the 8-bit write data, generates an acknowledge signal and then receives the stop condition, the internal write
operation of the EEPROM in the designated memory address will start. Rewriting is completed in the t WC period
after the stop condition. During an EEPROM internal write operation, no input is accepted and no acknowledge
signals are generated.
This product enables pages with up to 16 bytes to be written. The basic data transfer procedure is the same as for byte
writing: Following the start condition, the 7-bit device address and write command code “0,” word address (n), and
data (n) are input in this order while confirming acknowledge “0” every 9 bits. The page write mode is established if,
after data (n) is input, the write data (n+1) is input without inputting the stop condition. After this, the write data
equivalent to the largest page size can be received by a continuous process of repeating the receiving of the 8-bit
write data and generating the acknowledge signals.
At the point when the write data (n+1) has been input, the lower 4 bits (A0-A3) of the word addresses are
automatically incremented to form the (n+1) address. In this way, the write data can be successively input, and the
word address on the page is incremented each time the write data is input. If the write data exceeds 16 bytes or the
last address of the page is exceeded, the word address on the page is rolled over. Write data will be input into the
same address two or more times, but in such cases the write data that was input last will take effect. Finally, the
EEPROM internal write operation corresponding to the page size for which the write data is received starts from the
designated memory address when the stop condition is received.
Acknowledge polling is used to find out when the EEPROM internal write operation is completed. When the stop
condition is received and the EEPROM starts rewriting, all operations are prohibited, and no response can be given to
the signals sent by the master device. Therefore, in order to find out when the EEPROM internal write operation is
completed, the start condition, device address and write command code are sent from the master device to the
EEPROM (slave device), and the response of the slave device is detected.
In other words, if the slave device does not send the acknowledge signal, it means that the internal write operation is
in progress; conversely, if it does send the acknowledge signal, it means that the internal write operation has been
completed.
SDA
1
1
• • • • •
0 1 0
0 1 0
1
S2
0 1 0
D7 D6 - D1 D0
S2
S1
S1
A8
A8
S2
During Write
W
W
R/W
S1
R/W
ACK
A8
A7 A6 A5 A4 A3 A2 A1 A0
Memory Address(n)
NO ACK
ACK
W
D7 D6 - D1 D0
R/W
1
ACK
0 1 0
A7 A6 A5 A4 A3 A2 A1 A0
Word Address
LE24L042CS
S2
S1
A8
During Write
W
ACK
D7 D6 D5 D4 D3 D2 D1 D0
R/W
D7 D6 - D1 D0
NO ACK
ACK
D7 D6 D5 D4 D3 D2 D1 D0
Data(n)
1
ACK
Data
D7 D6 - D1 D0
0 1 0
Data(n+x)
ACK
D7 D6 - D1 D0
S2
Data(n+1)
S1
ACK
A8
ACK
End of Write
W
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R/W
• • • • •
ACK
ACK
• • • • •