rt8288a Richtek Technology Corporation, rt8288a Datasheet - Page 12

• Manufacturer Part Number: rt8288a
• Description: 4a, 21v 500khz Synchronous Step-down Converter
• Manufacturer: Richtek Technology Corporation

RT8288A
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
P
where T
the ambient temperature, and θ
thermal resistance.
For recommended operating condition specifications of
the RT8288A, the maximum junction temperature is 125°C
and T
thermal resistance, θ
(Exposed Pad) package, the thermal resistance, θ
75°C/W on a standard JEDEC 51-7 four-layer thermal test
board. The maximum power dissipation at T
be calculated by the following formula :
P
SOP-8 (Exposed Pad) package
The maximum power dissipation depends on the operating
ambient temperature for fixed T
resistance, θ
curve in Figure 6 allows the designer to see the effect of
rising ambient temperature on the maximum power
dissipation.
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12
D(MAX)
D(MAX)
A
is the ambient temperature. The junction to ambient
= (T
= (125°C − 25°C) / (75°C/W) = 1.333W for
J(MAX)
J(MAX)
JA
is the maximum junction temperature, T
. For the RT8288A package, the derating
− T
* : Optional
A
V
JA
) / θ
IN
, is layout dependent. For SOP-8
Figure 5. Reference Circuit with Snubber and Enable Timing Control
JA
R
JA
C
EN
EN
is the junction to ambient
*
*
J(MAX)
C
C
C
IN
and thermal
A
= 25°C can
1
5
7
VIN
VCC
EN
JA
RT8288A
A
, is
is
BOOT
GND
SW
FB
Layout Considerations
Follow the PCB layout guidelines for optimal performance
of the IC.
Keep the traces of the main current paths as short and
wide as possible.
Put the input capacitor as close as possible to the device
pins (VIN and GND).
SW node is with high frequency voltage swing and should
be kept at small area. Keep analog components away
from the SW node to prevent stray capacitive noise
pickup.
Connect feedback network behind the output capacitors.
Keep the loop area small. Place the feedback
components near the IC.
4
2, 3
6
8, 9 (Exposed Pad)
1.40
1.20
1.00
0.80
0.60
0.40
0.20
0.00
Figure 6. Derating Curves for RT8288A Package
0
C
R
C
BOOT
S
S
R
*
*
T
L
25
Ambient Temperature (°C)
R1
R2
50
C
DS8288A-01 August 2011
OUT
V
OUT
75
Four-Layer PCB
100
125