rt8470 Richtek Technology Corporation, rt8470 Datasheet - Page 12

• Manufacturer Part Number: rt8470
• Description: 1.2a/1a, Hysteretic, High Brightness Led Driver With Internal Switch
• Manufacturer: Richtek Technology Corporation

RT8470
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
P
where T
the ambient temperature, and θ
thermal resistance.
For recommended operating condition specifications of
the RT8470, the maximum junction temperature is 125°C
and T
thermal resistance, θ
23-5 packages, the thermal resistance, θ
on a standard JEDEC 51-3 single-layer thermal test board
and 160°C/W on a standard JEDEC 51-7 four-layer thermal
test board. For PSOP-8 package, the thermal resistance,
θ
thermal test board. The maximum power dissipation at T
= 25°C can be calculated by the following formulas :
P
TSOT-23-5 package (single-layer PCB)
P
TSOT-23-5 package (four-layer PCB)
P
PSOP-8
The maximum power dissipation depends on the operating
ambient temperature for fixed T
resistance, θ
curves in Figure 2 allow the designer to see the effect of
rising ambient temperature on the maximum power
dissipation.
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12
JA
D(MAX)
D(MAX)
D(MAX)
D(MAX)
, is 75°C/W on a standard JEDEC 51-7 four-layer
A
is the ambient temperature. The junction to ambient
= (T
= (125°C − 25°C) / (250°C/W) = 0.4W for
= (125°C − 25°C) / (160°C/W) = 0.625W for
= (125°C − 25°C) / (75°C/W) = 1.333W for
J(MAX)
J(MAX)
JA
is the maximum junction temperature, T
. For the RT8470 packages, the derating
− T
A
JA
) / θ
, is layout dependent. For TSOT-
JA
JA
is the junction to ambient
J(MAX)
JA
and thermal
, is 250°C/W
A
is
A
Layout Considerations
For best performance of the RT8470, please abide the
following layout guide.
Place the capacitor
C1 as close as
possible to VIN
The capacitor C
placed as close as possible to the VIN and SENSE pins
of the device respectively.
The GND should be connected to a strong ground plane.
Keep the main current traces as short and wide as
possible.
The inductor (L) should be mounted as close to the
device with low resistance connections.
The ADJ pin trace need to be kept far away from LX
terminal.
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
0
TSOT23-5 (Single-Layer PCB)
TSOT23-5 (Four-Layer PCB)
Figure 2. Derating Curve for Packages
LED-
Figure 3. PCB Layout Guide
25
Ambient Temperature (°C)
IN
GND
V
IN
and external resistor, R
L
PSOP-8
Place the resistor R
as close as possible
to VIN and SENSE
50
C
IN
D
DS8470-03 March 2011
75
VIN
LX GND ADJ
5
1
R
S
2
S
SENSE
100
4
3
S
, must be
LED+
125