rt9246 Richtek Technology Corporation, rt9246 Datasheet - Page 12

• Manufacturer Part Number: rt9246
• Description: Multi-phase Controller Core Power Supply
• Manufacturer: Richtek Technology Corporation

RT9246
The sensing circuit gets
R
3 phase operation) to cancel the voltage drop caused by
GM amplifier input bias current. I
just before low side MOSFET turns off (See Figure 2).
Therefore,
DAC Offset Voltage & Droop Tuning
The DAC offset voltage is set by compensation network
& VOSS pin external resistors by
The S/H current signals from power channels are injected
to ADJ pin to create droop voltage.
The DAC output voltage decreases by V
V
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12
I
I
T
I
VOSS
X
X
CORE
SP
OFF
(S/H)
(S/H)
Figure 3. DAC Offset Voltage & Droop Tune Circuit
= R
=
PWM Signal & High Side MOSFET Gate Signal
R
Figure 2. Inductor Current and PWM Signal
load droop (see Figure 3).
=
SN
1
=
=
VOSS
V
⎡
⎢
⎣
Current
Source
I
for channel 1 & R
⎡
⎢
⎢
⎢
⎢
⎣
V
L
I
Low Side MOSFET Gate Signal
L(AVG)
(S/H)
IN
V
R
R
V
COMP
Falling Slope = Vo/L
OSS
VOSS
−
SP
IN
×
Inductor Current
V
−
R
O
1
4
S
V
⎤
⎥
⎦
EA
I
VOSS
I ,
>
×
O
+
-
L
−
5uS
V
(S/H)
+
I
CORE
-
X
⎡
⎢
⎣
SP
=
V
FB
R
= 2R
F1
=
I
IN
for
L
V
R
×
2L
−
I
SP
+
IN
R
X
L
SN
V
V
fosc
V
(AVG)
S
⎛
⎜
⎝
-
V
is sampled and held
ADJ
ADJ
O
DAC
for channel 2 & 3 (at
R
by local feedback.
⎤
⎥
⎦
R
1
VOSS
ADJ
I
=
ADJ
×
L(S/H)
V
−
=
R
ADJ
∑
I
5uS
L
ADJ
V
200kHz
L
⎞
⎟
⎠
O
to form the
×
×
×
∑
⎤
⎥
⎥
⎥
⎥
⎦
R
4
T
×
1 f
2I
2I
2I
I 2
OFF
2
I
X1
X2
X3
L(AVG)
R
R
X
SP
S
,
.
Protection and SS Function
For OVP, the RT9246 detects the V
of the differential amplifier output. Eliminate the delay due
to compensation network (compared to sensing FB
voltage) for fast and accurate detection. The trip point of
OVP is 140% of normal output level. The PWM outputs
are pulled low to turn on the low side MOSFET and turn
off the high side MOSFET of the synchronous rectifier at
OVP. The OVP latch can only be reset by V
restart power on reset sequence. The PGOOD detection
trip point of V
The PGOOD open drain output pulls low when V
lower than the trip point. For V
fail conditions (V
OVP) reset the output low.
Soft-start circuit generates a ramp voltage by charging
external capacitor with 13μA current after IC POR acts.
The PWM pulse width and V
rising ramp to reduce the inrush current and protect the
power devices.
Over-current protection trip point is set by the resistor
R
channel
S/H current signal I
PWM output latched at high impedance to turn off both
high and low side MOSFETs in the power stage and initial
the hiccup mode protection. The SS pin voltage is pulled
low with a 13μA current after it is less than 90% V
converter restarts after SS pin voltage < 0.2V. Three times
of OCP disable the converter and only release the latch
by POR acts (see Figure 4).
IMAX
V
I
LOAD
CORE
S.S
0V
0A
connected to IMAX pin. OCP is triggered if one
COUNT = 1 COUNT = 2 COUNT = 3
Count = 1
CORE
T0,T1
CC
is 92% lower than the normal level.
X
& DVD are lower than trip point or
>
Count = 2
⎛
⎜
⎝
Overload
Figure 4.
Applied
0
R
T2
6 .
IMAX
TIME
TIME
V
ID
CORE
jumping issue, only power
⎞
⎟
⎠
DS9246-06 March 2007
×
CORE
. 1
Count = 3
T3,T4
are clamped by the
. 4
by V
Controller forces
DIF
pin voltage
CC
CC
or DVD
CORE
. The
is