adum1210 Analog Devices, Inc., adum1210 Datasheet - Page 5

• Manufacturer Part Number: adum1210
• Description: Dual-channel Digital Isolator
• Manufacturer: Analog Devices, Inc.

ELECTRICAL CHARACTERISTICS—3 V OPERATION
2.7 V ≤ V
unless otherwise noted. All typical specifications are at T
Table 2.
Parameter
DC SPECIFICATIONS
SWITCHING SPECIFICATIONS
1
2
3
4
The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load
present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See
Figure 4 through Figure 6 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 7 and Figure 8 for
total V
The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.
The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.
t
measured from the 50% level of the rising edge of the V
PHL
Input Supply Current, per Channel,
Output Supply Current, per Channel,
Total Supply Current, Two Channels
Input Currents
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Logic Low Output Voltages
Minimum Pulse Width
Maximum Data Rate
Propagation Delay
Pulse Width Distortion, |t
Propagation Delay Skew
Channel-to-Channel Matching,
Channel-to-Channel Matching,
Output Rise/Fall Time (10% to 90%)
Common-Mode Transient Immunity
Common-Mode Transient Immunity
Refresh Rate
Input Dynamic Supply Current,
Output Dynamic Supply Current,
propagation delay is measured from the 50% level of the falling edge of the V
Quiescent
Quiescent
Change vs. Temperature
Codirectional Channels
Opposing-Directional Channels
at Logic High Output
at Logic Low Output
per Channel
per Channel
DC to 2 Mbps
10 Mbps
DD1
V
V
V
V
DD1
DD2
DD1
DD2
and V
DD1
Supply Current
Supply Current
Supply Current
Supply Current
≤ 3.6 V, 2.7 V ≤ V
DD2
supply currents as a function of data rate.
8
8
4
3
2
7
7
5
PLH
6
− t
DD2
PHL
≤ 3.6 V. All minimum/maximum specifications apply over the entire recommended operating range,
|
4
6
1
Symbol
I
I
I
I
I
I
I
V
V
V
V
PW
t
PWD
t
t
t
t
|CM
|CM
f
I
I
DDI (Q)
DDO (Q)
DD1 (Q)
DD2 (Q)
DD1 (10)
DD2 (10)
IA
DDI (D)
DDO (D)
PHL
PSK
PSKCD
PSKOD
R
r
IH
IL
OAH
OAL
/t
, I
F
, t
IB
, V
H
L
Ix
, V
|
|
PLH
signal to the 50% level of the rising edge of the V
OBL
OBH
A
Min
−10
0.7 × V
V
V
10
20
25
25
= 25°C, V
DD2
DD2
− 0.1
− 0.5
Rev. C | Page 5 of 20
DD1
DD1
Ix
Typ
0.26
0.11
0.6
0.2
2.2
0.7
+0.01
3.0
2.8
0.0
0.04
0.2
5
3.0
35
35
1.1
0.10
0.03
= V
signal to the 50% level of the falling edge of the V
DD2
= 3.0 V. All voltages are relative to their respective ground.
Max
0.35
0.20
1.0
0.6
3.4
1.1
+10
0.3 × V
0.1
0.1
0.4
100
60
3
22
3
22
DD1
Ox
Unit
mA
mA
mA
mA
mA
mA
μA
V
V
V
V
V
V
V
ns
Mbps
ns
ns
ps/°C
ns
ns
ns
ns
kV/μs
kV/μs
Mbps
mA/Mbps
mA/Mbps
signal.
Test Conditions
DC to 1 MHz logic signal frequency
DC to 1 MHz logic signal frequency
5 MHz logic signal frequency
5 MHz logic signal frequency
0 V ≤ V
I
I
I
I
I
C
C
C
C
C
C
C
C
C
V
transient magnitude = 800 V
V
transient magnitude = 800 V
Ox
Ox
Ox
Ox
Ox
L
L
L
L
L
L
L
L
L
Ix
Ix
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= −20 μA, V
= −4 mA, V
= 20 μA, V
= 400 μA, V
= 4 mA, V
= V
= 0 V, V
DD1
IA
Ox
, V
, V
signal. t
CM
IB
CM
, ≤ V
Ix
= 1000 V,
Ix
Ix
= 1000 V,
= V
Ix
Ix
= V
= V
= V
DD1
= V
PLH
IxL
IxL
propagation delay is
IxH
IxL
ADuM1210
IxH