ht82k73e Holtek Semiconductor Inc., ht82k73e Datasheet - Page 13

• Manufacturer Part Number: ht82k73e
• Description: 2.4ghz Keyboard Tx 8-bit Otp Mcu
• Manufacturer: Holtek Semiconductor Inc.

forces the microcontroller into entering the Power Down
Mode, the processor will remain in a low-power state un-
til the logic condition of the selected wake-up pin on the
port pin changes from high to low. This function is espe-
cially suitable for applications that can be woken up via
external switches. Each pin on PA , PB, PC, PD,
PE0~PE6 has the capability to wake-up (by nibble) the
device by falling edge and PE0~PE6 have both falling
and rising wake-up function.
All I/O except PA , PB, PC, PD, PE0~PE6 are configured
as low to high nibble wake-up. It means once there are
one pin is in low level, the I/O cannot wake-up the MCU.
I/O Port Control Registers
Each I/O port has its own control register PAC, PBC,
PCC, PDC and PEC0~PEC6, to control the input/output
configuration. With this control register, each CMOS
output or input with or without pull-high resistor struc-
tures can be reconfigured dynamically under software
control. Each of the I/O ports is directly mapped to a bit
in its associated port control register.
For the I/O pin to function as an input, the corresponding
bit of the control register must be written as a 1 . This
will then allow the logic state of the input pin to be di-
rectly read by instructions. When the corresponding bit
of the control register is written as a 0 , the I/O pin will
be setup as a CMOS output. If the pin is currently setup
as an output, instructions can still be used to read the
output register. However, it should be noted that the pro-
gram will in fact only read the status of the output data
latch and not the actual logic status of the output pin.
Pin-shared Functions
The flexibility of the microcontroller range is greatly en-
hanced by the use of pins that have more than one func-
Rev. 1.00
Input/Output Ports
13
tion. Limited numbers of pins can force serious design
constraints on designers but by supplying pins with
multi-functions, many of these difficulties can be over-
come. For some pins, the chosen function of the
multi-function I/O pins is set by configuration options
while for others the function is set by application pro-
gram control.
External Timer Clock Input
The external timer pin TMR is pin-shared with the I/O
pin PA2. To configure this pin to operate as timer input,
the corresponding control bits in the timer control reg-
ister must be correctly set. For applications that do not
require an external timer input, this pin can be used as
a normal I/O pin. Note that if used as a normal I/O pin
the timer mode control bits in the timer control register
must select the timer mode, which has an internal
clock source, to prevent the input pin from interfering
with the timer operation.
The V1/V2 is for V-axis function
The V1/V2 pins are pin shared with the PE0/PE1 pins,
PE0, PE1 has falling and rising edge wake-up func-
tion, if it select can wake-up by OTP option. In halt
mode if PE0 wake-up the PF3 [1CH] will beset, if PE1
wake-up the PF4 [1CH] will be set, If user read PE0 or
PE1, the bit will be clear.
The Z1/Z is for Z-axis function
The Z1/Z2 pins are pin shared with the PE2/PE3 pins,
PE2, PE3has falling and rising edge wake-up func-
tion, if it select can wake-up by OTP option. In halt
mode if PE2 wake-up the PF6 [1CH] will beset, if PE3
wake-up the PF7 [1CH] will be set, If user read PE2 or
PE3, the bit will be clear.
If user read PF6 or PF7, the bit will be clear.
HT82K73E
April 16, 2008