ht82v842 Holtek Semiconductor Inc., ht82v842 Datasheet - Page 9

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ht82v842

Manufacturer Part Number
ht82v842
Description
Ccd Cds/pga/10b-20m-adc
Manufacturer
Holtek Semiconductor Inc.
Datasheet

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Part Number:
ht82v842A
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ST
0
Register Operations
Rev. 1.00
Mode 1
DOUT timing control
OUTCK polarity
ADCK polarity
ADIN connection
Reserved
ADC output
Black level reset
Power down
Mode 2
Clamp current
ADIN clamp
Clamp target
S/H, enable logic
Monitor selection
Mode 3
CDS gain control
Black loop gain boost
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
0
1
0
1
0
1
0
1
0
1
Control
0
0
1
0
0
1
1
0
0
1
1
0
1
x
0
1
0
1
0
1
0
1
0
1
0
0
1
1
0
1
0
1
0
1
0
1
9
0
1
0
0
1
1
0 Normal operation
1 Power down, or logic of STBY
0 Monitor off
1 CDS signal to monitor
0 PGA output monitor
1 Output REFIN and CCDIN
DOUT synchronizes to ADCK
DOUT synchronizes to OUTCK
DOUT changes at OUTCK rising edge
DOUT changes at OUTCK falling edge
Normal operation as timing chart
ADCK clock inversion
ADIN function OFF
ADIN signal to PGA
ADIN signal to ADC
Reserved
Reserved
Normal operation, ADC data output
ADC output high-Z, or logic of STBY
Normal operation
Black level reset, or logic of RESET
Normal clamp ±50mA
Fast clamp ±100mA
Clamp operation active for ADIN
No clamp for ADIN
Normal mode, clamp both REFIN and CCDIN
Clamp REFIN only
Clamp CCDIN only
Clamp off
Normal operation as timing chart
S/H control polarity inversion
Enable control polarity inversion
Both of S/H and enable inversion
CDS gain=odB
CDS gain=6.02dB
CDS gain=12.04dB
CDS gain=-1.94dB
Boost control on
Always high gain
Operations
HT82V842
July 15, 2004

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