lcmxo2-2000ze-1uwg49itr1 Lattice Semiconductor Corp., lcmxo2-2000ze-1uwg49itr1 Datasheet - Page 77

• Manufacturer Part Number: lcmxo2-2000ze-1uwg49itr1
• Manufacturer: Lattice Semiconductor Corp.

Lattice Semiconductor
Pin Information Summary
General Purpose I/O per Bank
Bank 0
Bank 1
Bank 2
Bank 3
Bank 4
Bank 5
Total General Purpose Single Ended I/O
Differential I/O per Bank
Bank 0
Bank 1
Bank 2
Bank 3
Bank 4
Bank 5
Total General Purpose Differential I/O
Dual Function I/O
High-speed Differential I/O
Bank 0
Gearboxes
Number of 7:1 or 8:1 Output Gearbox
Available (Bank 0)
Number of 7:1 or 8:1 Input Gearbox
Available (Bank 2)
DQS Groups
Bank 1
VCCIO Pins
Bank 0
Bank 1
Bank 2
Bank 3
Bank 4
Bank 5
VCC
GND
NC
Total Count of Bonded Pins
1. These signals should not be connected to a power supply rail, ground or user I/O on a PCB.
1
64 ucBGA
10
12
11
12
45
22
27
63
0
0
5
6
5
6
0
0
0
0
0
0
2
2
2
2
0
0
2
8
1
MachXO2-256
100 TQFP
14
14
14
14
56
28
29
25
75
0
0
7
7
7
7
0
0
0
0
0
0
2
2
2
3
0
0
2
8
4-3
132 csBGA
14
14
14
14
56
28
29
10
50
82
0
0
7
7
7
7
0
0
0
0
0
0
3
3
3
3
0
0
4
100 TQFP
MachXO2 Family Data Sheet
19
20
20
20
79
10
10
10
39
29
98
MachXO2-640
0
0
9
0
0
0
0
0
0
2
2
2
3
0
0
2
8
2
132 csBGA
Pinout Information
106
20
20
20
20
80
10
10
10
10
40
29
10
26
0
0
0
0
0
0
0
0
3
3
3
3
0
0
4
MachXO2-640U
144 TQFP
108
136
28
26
28
26
14
13
14
13
54
33
12
0
0
0
0
7
7
7
2
3
3
3
3
0
0
4
8