as7c33512ft18a ETC-unknow, as7c33512ft18a Datasheet

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as7c33512ft18a

Manufacturer Part Number
as7c33512ft18a
Description
Manufacturer
ETC-unknow
Datasheet
November 2004
Features
• Organization: 524,288 words × 18 bits
• Fast clock to data access: 7.5/8.5/10ns
• Fast OE access time: 3.5/4.0 ns
• Fully synchronous flow-through operation
• Asynchronous output enable control
• Available in 100-pin TQFP package
• Individual byte write and global write
Logic block diagram
Selection guide
Minimum cycle time
Maximum clock access time
Maximum operating current
Maximum standby current
Maximum CMOS standby current (DC)
11/30/04, v 1.1
A[18:0]
ADSC
ADSP
ADV
CLK
GWE
BWE
BW
BW
CE0
CE1
CE2
OE
ZZ
b
a
3.3V 512K × 18 Flow-through synchronous SRAM
Power
down
Alliance Semiconductor
19
CLK
CS
D
CLK
CS
CLR
D
D
D
D
CLK
CLK
CE
CLK
CLK
Byte Write
Byte Write
Address
register
registers
registers
register
register
Enable
Enable
300
delay
110
DQb
-75
8.5
7.5
DQa
30
Burst logic
Q
Q
Q
Q
Q
LBO
• Multiple chip enables for easy expansion
• 3.3V core power supply
• 2.5V or 3.3V I/O operation with separate VDDQ
• Linear or interleaved burst control
• Snooze mode for reduced power-standby
• Common data inputs and data outputs
19
®
17
19
OE
275
100
CLK
-85
8.5
10
30
registers
Output
2
18
512K x 18
Memory
18
DQ[a,b]
array
CLK
registers
18
Input
Copyright © Alliance Semiconductor. All rights reserved.
AS7C33512FT18A
250
-10
12
10
90
30
1 of 19
Units
mA
mA
mA
ns
ns

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as7c33512ft18a Summary of contents

Page 1

... D Q DQa Byte Write registers CLK D Q Enable register CE CLK D Q Enable Power delay down register CLK -75 8.5 7.5 300 110 30 Alliance Semiconductor AS7C33512FT18A 512K x 18 Memory 19 array Input Output registers registers CLK CLK 18 DQ[a,b] -85 - 8.5 10 275 250 100 90 30 ...

Page 2

... Mode PL-SCD PL-SCD PL-SCD PL-DCD PL-DCD PL-DCD NTD-PL NTD-PL NTD-PL NTD-FT NTD-FT NTD- Alliance Semiconductor AS7C33512FT18A Speed 166/133 MHz 166/133 MHz 166/133 MHz 166/133 MHz 166/133 MHz 166/133 MHz 7.5/8.5/10 ns 7.5/8.5/10 ns 7.5/8.5/10 ns 166/133 MHz 166/133 MHz 166/133 MHz 7.5/8.5/10 ns 7.5/8.5/10 ns 7.5/8.5/ ...

Page 3

... DQb5 DDQ V 21 SSQ DQb6 22 DQb7 23 DQpb SSQ V 27 DDQ 11/30/04, v 1.1 ® TQFP 14 × 20mm Alliance Semiconductor AS7C33512FT18A DDQ V 76 SSQ NC 75 DQpa 74 DQa7 73 DQa6 SSQ V 70 DDQ DQa5 69 DQa4 68 VSS ...

Page 4

... WE signals are sampled on the clock edge that samples ADSC low (and ADSP high). • Master chip enable CE0 blocks ADSP, but not ADSC. The AS7C33512FT18A family operates from a core 3.3V power supply. I/Os use a separate power supply that can operate at 2.5V or 3.3V. These devices are available in 100-pin TQFP. ...

Page 5

... DESELECT or READ cycle should be given while the SRAM is transitioning out of SNOOZE MODE. PUS 11/30/04, v 1.1 ® Description or left floating, device follows interleaved Burst order. When DD is guaranteed after the time t is met. After entering SNOOZE MODE, all inputs except ZZ is SB2 ZZI Alliance Semiconductor AS7C33512FT18A . The duration of SB2 ...

Page 6

... Address Address Address Address Alliance Semiconductor AS7C33512FT18A ...

Page 7

... Alliance Semiconductor AS7C33512FT18A CLK Operation Deselect Deselect Deselect Deselect Deselect External Begin read External Begin read External ...

Page 8

... Symbol Min Nominal V 3.135 3 3.135 3.3 DDQ Vss 0 0 Symbol Min Nominal V 3.135 3 2.375 2.5 DDQ Vss 0 0 Alliance Semiconductor AS7C33512FT18A Min Max Unit –0.5 +4.6 –0 0.5 DD –0 0.5 DDQ – 1.8 – –65 +150 –65 +135 Max Unit 3.465 V 3.465 V 0 ...

Page 9

... Deselected < Max IL Deselected < 0.2V, ≤ 0.2V or ≥ V all V – 0. ≥ V Deselected – 0.2V, Max DD ≤ ≥ V all Alliance Semiconductor AS7C33512FT18A Min Max Unit -2 2 µA DD < µA DDQ 2 2** V +0.3 DDQ -0.3* 0 ...

Page 10

... ADVS t 2.0 – 2.0 ADSPS t 2.0 – 2.0 ADSCS t 0.5 – 0.5 ADVH t 0.5 – 0.5 ADSPH t 0.5 – 0.5 ADSCH Conditions Symbol ZZ > SB2 t PDS t PUS t ZZI t RZZI Alliance Semiconductor AS7C33512FT18A –10 Min Max Unit Notes – 12 – ns 8.5 – 4.0 – 4.0 ns – 2.5 – ns 2,3,4 – 2.5 – ns – 0 – ns 2,3,4 4.0 – 4.0 ns 2,3,4 5.0 – 5.0 ns 2,3,4 – ...

Page 11

... OH Q(A2Ý01) Q(A2Ý10) Q(A2Ý11 Read Burst Burst Suspend Burst Q(A2) Read Read Read Read Q(A 2Ý01 ) Q(A 2Ý10 ) Q(A 2Ý10 ) Q(A 2Ý11 ) Alliance Semiconductor AS7C33512FT18A don’t care Undefined A3 Q(A3) Q(A3Ý01) Q(A3Ý11) Q(A3Ý10) t HZC Read Burst Burst Burst Q(A3) Read Read Read DSEL Q(A 3Ý01 ) Q(A 3Ý10 ) Q(A 3Ý ...

Page 12

... CYC t CL ADSC LOADS NEW ADDRESS A2 ADV SUSPENDS BURST D(A2) D(A2Ý01) D(A2Ý01) Read Suspend ADV Suspend Write Q(A2) Write Burst Write D D(A 2Ý01 ) D(A1) Write D(A 2Ý01 ) Alliance Semiconductor AS7C33512FT18A t ADSCS t ADSCH ADVS t ADVH D(A2Ý10) D(A2Ý11) D(A3) D(A3Ý01) D(A3Ý10) ADV ADV Write ...

Page 13

... ADVS t ADVH D(A2 HZOE LZOE Q(A3) Suspend Read Suspend Read Read Q(A2) Write Q(A3) Q(A1) D Alliance Semiconductor AS7C33512FT18A t OH Q(A3Ý01) Q(A3Ý10) Q(A3Ý11) ADV ADV ADV Suspend Burst Burst Burst Read Read Read Read Q(A 3Ý11 ) Q(A 3Ý01 ) Q(A 3Ý10 ) Q(A 3Ý ...

Page 14

... Dout Din READ READ Q(A1) Q(A2) Note: ADV is don’t care here. 11/30/04, v 1.1 ® t CYC HZOE Q(A3) Q(A4 D(A5) D(A6) D(A7) READ WRITE READ WRITE Q(A3) D(A6) Q(A4) D(A5) Alliance Semiconductor AS7C33512FT18A A10 Q(A9) Q(A10) D(A8) READ WRITE WRITE READ Q(A10) D(A7) D(A8) Q(A9 ...

Page 15

... LZOE Din Dout Q(A1) t PDS ZZ ZZ Setup Cycle t ZZI I supply READ READ Q(A1) Q(A1Ý01) 11/30/04, v 1.1 ® HZC t PUS ZZ Recovery Cycle t RZZI I SB2 Sleep State Alliance Semiconductor AS7C33512FT18A t CYC HZOE Q(A2) Q(A2(Ý01)) Normal Operation Mode READ READ Q(A2) Q(A2Ý01 ...

Page 16

... OUT for 3.3V I/ DDQ for 2.5V I/O Figure B: Output load (A) at any given temperature and voltage. LZC is measured as low if below VIL. CL Alliance Semiconductor AS7C33512FT18A Thevenin equivalent: +3.3V for 3.3V I/O; /+2.5V for 2.5V I/O 319Ω/1667Ω D OUT 5 pF* 353Ω/1538Ω /2 GND *including scope and jig capacitance ...

Page 17

... Package dimensions 100-pin quad flat pack (TQFP) TQFP Min Max A1 0.05 0.15 A2 1.35 1.45 b 0.22 0.38 c 0.09 0.20 D 13.90 14.10 E 19.90 20.10 e 0.65 nominal Hd 15.85 16.15 He 21.80 22.20 L 0.45 0.75 L1 1.00 nominal α 0° 7° Dimensions in millimeters 11/30/04, v 1.1 ® Alliance Semiconductor AS7C33512FT18A α ...

Page 18

... Ordering information Package & Width AS7C33512FT18A-75TQC TQFP x 18 AS7C33512FT18A-75TQI Note: Add suffix ‘N’ to the above part number for Lead Free Parts (Ex. AS7C33512FT18A-85TQCN) Part numbering guide AS7C 33 512 1.Alliance Semiconductor SRAM prefix 2.Operating voltage 3.3V 3.Organization: 512 = 512K 4.Flow-through mode 5.Organization ...

Page 19

... Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use. AS7C33512FT18A ® Copyright © Alliance Semiconductor All Rights Reserved Part Number: AS7C33512FT18A Document Version: v 1.1 ...

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