as7c3256a-8 ETC-unknow, as7c3256a-8 Datasheet - Page 2

• Manufacturer Part Number: as7c3256a-8
• Description: 3.3v 32k X 8 Cmos Sram Common I/o
• Manufacturer: ETC-unknow

3/22/05; v.1.0
Functional description
The AS7C3256A is a 3.3V high-performance CMOS 262,144-bit Static Random-Access Memory (SRAM) device
organized as 32,768 words × 8 bits. It is designed for memory applications requiring fast data access at low voltage,
including Pentium
permit 3.3V operation without sacrificing performance or operating margins.
The device enters standby mode when
power reduction after initial access, resulting in significant power savings during CPU idle, suspend, and stretch mode.
Equal address access and cycle time (t
performance applications. The chip enable (
organizations.
A write cycle is accomplished by asserting chip enable (CE) and write enable (WE) LOW. Data on the input pins I/O0-I/O7
is written on the rising edge of WE (write cycle 1) or CE (write cycle 2). To avoid bus contention, external devices should
drive I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE).
A read cycle is accomplished by asserting chip enable (
chip drives I/O pins with the data word referenced by the input address. When chip enable or output enable is high, or write
enable is low, output drivers stay in high-impedance mode.
All chip inputs and outputs are TTL-compatible. Operation is from a single 3.3 ±0.3V supply. The AS7C3256A is packaged
in high volume industry standard packages.
Absolute maximum ratings
Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect reliability.
Truth table
Key:
Voltage on V
Voltage on any pin relative to GND
Power dissipation
Storage temperature (plastic)
Ambient temperature with V
DC current into outputs (low)
X = Don’t care, L = Low, H = High
CE
H
L
L
L
CC
Parameter
relative to GND
TM
, PowerPC
WE
X
H
H
L
CC
TM
applied
, and portable computing. Alliance’s advanced circuit design and process techniques
AA
CE
Alliance Semiconductor
, t
is high. CMOS standby mode consumes 7.2 mW. Normal operation offers 75%
RC
Symbol
, t
CE
T
I
OE
T
V
V
OUT
WC
P
X
H
X
bias
L
stg
D
t1
t2
) input permits easy memory expansion with multiple-bank memory
) of 8 ns with output enable access time (t
CE
) and output enable (
High Z
High Z
D
D
OUT
IN
Min
®
–0.5
–0.5
–65
–55
–
–
Data
OE
) LOW, with write enable (
V
CC
Max
+150
+125
+5.0
Standby (I
Output disable (I
Read (I
Write (I
1.0
20
OE
+ 0.5
) of 5 ns are ideal for high-
CC
CC
)
SB
)
Mode
AS7C3256A-8
, I
SB1
WE
CC
P. 2 of 9
)
)
) high. The
Unit
mA
o
o
W
V
V
C
C