as7c251mft18a ETC-unknow, as7c251mft18a Datasheet

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as7c251mft18a

Manufacturer Part Number
as7c251mft18a
Description
2.5v 1m X 18 Flowthrough Burst Synchronous Sram
Manufacturer
ETC-unknow
Datasheet
Logic block diagram
Selection guide
Features
• Organization: 1,048,576 words x18 bits
• Fast clock to data access: 7.5/8.5/10 ns
• Fast OE access time: 3.5/4.0 ns
• Fully synchronous flow-through operation
• Asynchronous output enable control
• Available 100-pin TQFP package
December 2004
Minimum cycle time
Maximum clock access time
Maximum operating current
Maximum standby current
Maximum CMOS standby current (DC)
12/24/04, v. 1.2
A[19:0]
ADSC
ADSP
GWE
ADV
BWE
BW
CLK
BW
CE0
CE1
CE2
2.5V 1M x 18 flowthrough burst synchronous SRAM
OE
ZZ
b
a
Power
down
20
Alliance Semiconductor
CLK
CS
D
CLK
CS
CLR
275
D
D
D
-75
8.5
7.5
D
CLK
CLK
CE
CLK
CLK
90
60
Byte Write
Byte Write
Address
register
registers
registers
register
register
Enable
Enable
delay
DQb
DQa
Burst logic
Q
Q
Q
Q
Q
LBO
• Individual byte write and global write
• Multiple chip enables for easy expansion
• 2.5V core power supply
• Linear or interleaved burst control
• Snooze mode for reduced power-standby
20
®
18
250
-85
8.5
10
80
60
20
OE
Output
buffers
2
18
1M x 18
Memory
18
DQ[a,b]
array
CLK
registers
18
Input
230
-10
12
10
80
60
Copyright © Alliance Semiconductor. All rights reserved.
AS7C251MFT18A
Units
mA
mA
mA
ns
ns
1 of 19

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as7c251mft18a Summary of contents

Page 1

... Q Enable register CE CLK D Q Enable Power delay down register CLK -75 -85 8.5 10 7.5 8.5 275 250 Alliance Semiconductor AS7C251MFT18A Memory 20 array Input Output registers buffers CLK 18 DQ[a,b] -10 Units 12 10 230 Copyright © Alliance Semiconductor. All rights reserved. ...

Page 2

... Mode PL-SCD PL-SCD PL-SCD PL-DCD PL-DCD PL-DCD NTD-PL NTD-PL NTD-PL NTD-FT NTD-FT NTD- Alliance Semiconductor AS7C251MFT18A Speed 166/133 MHz 166/133 MHz 166/133 MHz 166/133 MHz 166/133 MHz 166/133 MHz 7.5/8.5/10 ns 7.5/8.5/10 ns 7.5/8.5/10 ns 166/133 MHz 166/133 MHz 166/133 MHz 7.5/8.5/10 ns 7.5/8.5/10 ns 7.5/8.5/ ...

Page 3

... V 20 DDQ V 21 SSQ 22 DQb6 DQb7 23 24 DQPb SSQ V 27 DDQ 12/24/04, v. 1.2 ® TQFP 14 x 20mm Alliance Semiconductor AS7C251MFT18A DDQ 76 V SSQ DQPa DQa7 73 72 DQa6 V 71 SSQ 70 V DDQ 69 DQa5 68 DQa4 ...

Page 4

... WE signals are sampled on the clock edge that samples ADSC LOW (and ADSP HIGH). Master chip enable • CE0 blocks ADSP, but not ADSC. The AS7C251MFT18A family operates from a core 2.5V power supply. These devices are available in a 100-pin TQFP package. TQFP capacitance Parameter Symbol ...

Page 5

... DESELECT or READ cycle should be given while the SRAM is transitioning out of SNOOZE MODE. PUS 12/24/04, v. 1.2 ® or left floating, device follows interleaved Burst order. When DD is guaranteed after the time t is met. After entering SNOOZE MODE, all inputs except ZZ is SB2 ZZI Alliance Semiconductor AS7C251MFT18A . The duration of SB2 ...

Page 6

... Linear burst address (LBO = Address Address Address Address Alliance Semiconductor AS7C251MFT18A BWb ...

Page 7

... X External Next Next Current Current Alliance Semiconductor AS7C251MFT18A CLK Operation Deselect Deselect Deselect Deselect Deselect Begin read Begin read Begin read ...

Page 8

... IN V –0 – – OUT T –65 stg T –65 bias Symbol Min Nominal V 2.375 2 2.375 2.5 DDQ Vss 0 0 Alliance Semiconductor AS7C251MFT18A Max Unit +3 0 0.3 V DDQ 1 +150 C o +135 C Max Unit 2.625 V 2.625 ...

Page 9

... Deselected < Max Deselected < 0.2V, I SB1 ≤ 0.2V or ≥ V all ≥ V Deselected Max I SB2 ≤ ≥ V all Alliance Semiconductor AS7C251MFT18A Min Max < < OUT DDQ 1.7* V +0.3 DD 1.7* V DDQ -0.3** 0.7 -0.3** 0.7 1.7 – – ...

Page 10

... ADSPS t 2.0 – 2.0 ADSCS t 0.5 – 0.5 ADVH t 0.5 – 0.5 ADSPH t 0.5 – 0.5 ADSCH Conditions Symbol ZZ > SB2 t PDS t PUS t ZZI t RZZI Alliance Semiconductor AS7C251MFT18A –10 Min Max Unit Notes – 12 – ns – – 4.0 ns – 2.5 – ns 2,3,4 – 3.0 – ns – 0 – ns 2,3,4 - 4.0 ns 2,3,4 - 4.0 ns 2,3,4 – 0 – ...

Page 11

... ADV inserts wait states t HZOE t OH Q(A2Ý01) Q(A2Ý10) Q(A2Ý11 Read Burst Burst Suspend Burst Q(A2) Read Read Read Read Q(A 2Ý01 ) Q(A 2Ý10 ) Q(A 2Ý10 ) Q(A 2Ý11 ) Alliance Semiconductor AS7C251MFT18A A3 Q(A3Ý11) Q(A3) Q(A3Ý01) Q(A3Ý10) t HZC Read Burst Burst Burst Q(A3) Read Read Read DSEL Q(A 3Ý01 ) Q(A 3Ý10 ) Q(A 3Ý11 ) Undefined ...

Page 12

... CYC t CL ADSC LOADS NEW ADDRESS A2 ADV SUSPENDS BURST D(A2) D(A2Ý01) D(A2Ý01) Read Suspend ADV Suspend Write Q(A2) Write Burst Write D D(A 2Ý01 ) D(A1) Write D(A 2Ý01 ) Alliance Semiconductor AS7C251MFT18A t ADSCS t ADSCH ADVS t ADVH D(A2Ý10) D(A2Ý11) D(A3) D(A3Ý01) D(A3Ý10) ADV ADV Write ...

Page 13

... ADVS t ADVH D(A2 HZOE LZOE Q(A3) Suspend Read Suspend Read Read Q(A2) Write Q(A3) Q(A1) D Alliance Semiconductor AS7C251MFT18A t OH Q(A3Ý01) Q(A3Ý10) Q(A3Ý11) ADV ADV ADV Suspend Burst Burst Burst Read Read Read Read Q(A 3Ý11 ) Q(A 3Ý01 ) Q(A 3Ý10 ) Q(A 3Ý ...

Page 14

... Dout Din READ READ Q(A1) Q(A2) Note: ADV is don’t care here. 12/24/04, v. 1.2 ® t CYC HZOE Q(A3) Q(A4 D(A5) D(A6) D(A7) READ WRITE READ WRITE Q(A3) D(A6) Q(A4) D(A5) Alliance Semiconductor AS7C251MFT18A A10 Q(A9) Q(A10) D(A8) READ WRITE WRITE READ Q(A10) D(A7) D(A8) Q(A9 ...

Page 15

... Din Dout Q(A1) t PDS ZZ ZZ Setup Cycle t ZZI I supply READ READ Q(A1) Q(A1Ý01) W[a:b] is don’t care. 12/24/04, v. 1.2 ® HZC t PUS ZZ Recovery Cycle t RZZI I SB2 Sleep State Alliance Semiconductor AS7C251MFT18A t CYC HZOE Q(A2) Q(A2(Ý01)) Normal Operation Mode READ READ Q(A2) Q(A2Ý01 ...

Page 16

... pF* Figure B: Output load (A) at any given temperature and voltage. LZC is measured as low below VIL Alliance Semiconductor AS7C251MFT18A Thevenin equivalent: +2.5V 319Ω/1667Ω D OUT /2 DDQ 5 pF* 353Ω/1538Ω GND *including scope and jig capacitance Figure C: Output load(B) ...

Page 17

... Package dimensions 100-pin TQFP (quad flat pack) TQFP Min Max c A1 0.05 0.15 A2 1.35 1. 0.22 0. 0.09 0.20 D 13.90 14.10 E 19.90 20.10 e 0.65 nominal Hd 15.85 16.15 He 21.80 22.20 L 0.45 0.75 L1 1.00 nominal α 0° 7° Dimensions in millimeters 12/24/04, v. 1.2 ® α Alliance Semiconductor AS7C251MFT18A ...

Page 18

... Ordering information Width Package & AS7C251MFT18A-75TQC TQFP x18 AS7C251MFT18A-75TQI Note: Add ‘N’ to the above part numbers for Lead Free Parts (Ex. AS7C251MFT18A-85TQCN) Part numbering guide AS7C Alliance Semiconductor SRAM prefix 2. Operating voltage 2.5V 3. Organization Flow-through mode 5. Organization x18 6. Production version first production version 7. Clock access time: [-75 = 7.5 ns ...

Page 19

... Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use. AS7C251MFT18A ® Copyright © Alliance Semiconductor All Rights Reserved Part Number: AS7C251MFT18A Document Version: v. 1.2 ...

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