as7c252mntf18a ETC-unknow, as7c252mntf18a Datasheet

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as7c252mntf18a

Manufacturer Part Number
as7c252mntf18a
Description
2.5v 2m X 18 Flowthrough Sram With Ntd
Manufacturer
ETC-unknow
Datasheet
Logic block diagram
Selection guide
January 2005
Features
• Organization: 2,097,152 words × 18 bits
• NTD
• Fast clock to data access: 7.5/8.5/10 ns
• Fast OE access time: 3.5/4.0 ns
• Fully synchronous operation
• Flow-through mode
• Asynchronous output enable control
• Available in 100-pin TQFP package
Minimum cycle time
Maximum clock access time
Maximum operating current
Maximum standby current
Maximum CMOS standby current (DC)
1/17/05, v 1.1
architecture for efficient bus operation
A[19:0]
CE0
CE1
CE2
ADV / LD
DQ [a,b]
2.5V 2M x 18 Flowthrough SRAM with NTD
BWb
BWa
R/W
LBO
ZZ
CLK
CEN
20
18
D
D
Control
burst logic
Address
register
register
logic
CLK
input
Data
CLK
Alliance Semiconductor
CLK
Q
Q
325
140
-75
8.5
7.5
90
• Byte write enables
• Clock enable for operation hold
• Multiple chip enables for easy expansion
• 2.5V core power supply
• Self-timed write cycles
• Interleaved or linear burst modes
• Snooze mode for standby operation
20
OE
18
D
addr. registers
CLK
Write delay
®
300
130
-85
Q
8.5
OE
10
90
18
CLK
Output
18
buffer
DQ [a,b]
18
20
2M x 18
SRAM
array
18
TM
Copyright © Alliance Semiconductor. All rights reserved.
AS7C252MNTF18A
275
130
-10
12
10
90
P. 1 of 18
Units
mA
mA
mA
ns
ns

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as7c252mntf18a Summary of contents

Page 1

... Address register burst logic CLK D Write delay addr. registers CLK Control logic CLK 18 18 Data D Q input register CLK OE -75 8.5 7.5 325 140 90 Alliance Semiconductor AS7C252MNTF18A CLK SRAM array Output buffer [a,b] -85 -10 Units 10 12 8.5 10 300 275 mA 130 130 ...

Page 2

... Mode PL-SCD PL-SCD PL-SCD PL-DCD PL-DCD PL-DCD NTD-PL NTD-PL NTD-PL NTD-FT NTD-FT NTD- Alliance Semiconductor AS7C252MNTF18A Speed 200/166/133 MHz 200/166/133 MHz 200/166/133 MHz 200/166/133 MHz 200/166/133 MHz 200/166/133 MHz 7.5/8.5/10 ns 7.5/8.5/10 ns 7.5/8.5/10 ns 200/166/133 MHz 200/166/133 MHz 200/166/133 MHz 7.5/8.5/10 ns 7.5/8.5/10 ns 7.5/8.5/ ...

Page 3

... V 20 DDQ V 21 SSQ DQb6 22 DQb7 23 24 DQPb SSQ V 27 DDQ 1/17/05, v 1.1 ® TQFP 14 x 20mm Alliance Semiconductor AS7C252MNTF18A DDQ 76 V SSQ 75 NC DQPa 74 DQa7 73 72 DQa6 V 71 SSQ 70 V DDQ 69 DQa5 68 DQa4 ...

Page 4

... Functional Description The AS7C252MNTF18A family is a high performance CMOS 32 Mbit synchronous Static Random Access Memory (SRAM) organized as 2,097,152 words × 18 bits and incorporates a LATE Write. This variation of the 32Mb+ synchronous SRAM uses the No Turnaround Delay (NTD write operation that improves bandwidth over flowthrough burst devices normal flowthrough burst device, the write data, command, and address are all applied to the device on the same clock edge ...

Page 5

... SNOOZE MODE during tPUS, only a DESELECT or READ cycle should be given while the SRAM is transitioning out of SNOOZE MODE. 1/17/05, v 1.1 ® Description or left floating, device follows interleaved Burst order. When DD is met. After entering SNOOZE MODE, all inputs except ZZ ZZI Alliance Semiconductor AS7C252MNTF18A ...

Page 6

... External NOP/WRITE ABORT (Begin Burst) High Next Current enables WRITEs to byte “b” (DQb pins). Alliance Semiconductor AS7C252MNTF18A A1A0 A1A0 A1A0 ...

Page 7

... IN V –0 – – OUT T –65 stg T –65 bias Symbol Min Nominal V 2.375 2 2.375 2.5 DDQ Vss 0 0 Alliance Semiconductor AS7C252MNTF18A Max Unit +4 0 0.5 V DDQ 1 +150 C o +135 C Max Unit 2.625 V 2.625 ...

Page 8

... Deselected < Max Deselected < 0.2V, I SB1 ≤ 0.2V or ≥ V all ≥ V Deselected Max I SB2 ≤ ≥ V all Alliance Semiconductor AS7C252MNTF18A Min Max < < OUT DDQ 1.7* V +0.3 DD 1.7* V DDQ -0.3** 0.7 -0.3** 0.7 1.7 – – ...

Page 9

... CSH t 2.0 – 2.0 CENS t 0.5 – 0.5 CENH t 2.0 – 2.0 ADVS t 0.5 – 0.5 ADVH Conditions Symbol ZZ > SB2 t PDS t PUS t ZZI t RZZI Alliance Semiconductor AS7C252MNTF18A -10 1 Unit Notes Min Max – 12 – ns – – 4.0 ns – 2.5 – ns 2,3,4 – 2.5 – – 0 – ns 2,3,4 – 4.0 ns 2,3,4 – 5.0 ...

Page 10

... Falling input HZOE Q(A2) Q(A2Y‘01) Q(A2Y‘10) BURST READ BURST BURST READ Q(A2) READ READ Q(A2Ý11) Q(A2Ý01) Q(A2Ý10) Alliance Semiconductor AS7C252MNTF18A Undefined t CYC A3 Q(A2Y‘11) Q(A3) Q(A3Y‘01) STALL READ BURST Q(A3) READ Q(A3Ý01 ...

Page 11

... ADV/LD OE D(A1) Din t HZOE Dout Q(n-1) WRITE DSEL Command D(A1) 1/17/05, v 1.1 ® D(A2) D(A2Y‘01) D(A2Y‘10) BURST BURST WRITE BURST WRITE WRITE D(A2) WRITE D(A2Ý10) D(A2Ý11) D(A2Ý01) Alliance Semiconductor AS7C252MNTF18A t CYC D(A3) D(A2Y‘11) D(A3Y‘01) STALL WRITE BURST D(A3) WRITE D(A3Ý01 ...

Page 12

... Note: Ý = XOR when LBO = high/no connect. Ý = ADD when LBO = low. 1/17/05, v 1.1 ® HZOE LZC OH D(A2) Q(A3) Q(A4) D(A2Ý01) BURST BURST READ READ WRITE READ Q(A3) Q(A4) D(A2Ý01) Q(A4Ý01) Alliance Semiconductor AS7C252MNTF18A t CYC HZC D(A5) Q(A6) D(A7) Q(A4Ý01) t LZOE WRITE READ WRITE DSEL D(A5) Q(A6) D(A7 ...

Page 13

... Command Q(A1) Q(A1 Ý Note: Ý = XOR when LBO = high/no connect; Ý = ADD when LBO = low low. 1/17/05, v 1.1 ® Q(A1Ý10) Q(A1Ý01) STALL DSEL BURST BURST 01) Q(A1 10) DSEL Ý Alliance Semiconductor AS7C252MNTF18A A2 A3 D(A2) BURST WRITE WRITE BURST WRITE NOP D(A2) D(A2 10) Ý NOP D(A3) D(A2 01) Ý ...

Page 14

... Timing waveform of snooze mode CLK ZZ setup cycle ZZ t ZZI I supply I SB2 All inputs Deselect or Read Only (except ZZ) Dout 1/17/05, v 1.1 ® t PUS ZZ recovery cycle t RZZI Deselect or Read Only High-Z Alliance Semiconductor AS7C252MNTF18A Normal operation Cycle ...

Page 15

... L for 3.3V I/ DDQ for 2.5V I/O Figure B: Output load (A) at any given temperature and voltage. LZC IL Alliance Semiconductor AS7C252MNTF18A Thevenin equivalent: +3.3V for 3.3V I/O; /+2.5V for 2.5V I/O 319Ω/1667Ω D OUT 5 pF* 353Ω/1538Ω GND *including scope and jig capacitance Figure C: Output load(B) ...

Page 16

... Package dimensions 100-pin quad flat pack (TQFP) TQFP Min Max A1 0.05 0.15 A2 1.35 1.45 b 0.22 0.38 c 0.09 0.20 D 13.90 14.10 E 19.90 20.10 e 0.65 nominal Hd 15.85 16.15 He 21.80 22.20 L 0.45 0.75 L1 1.00 nominal α 0° 7° Dimensions in millimeters 1/17/05, v 1.1 ® Alliance Semiconductor AS7C252MNTF18A b e α ...

Page 17

... Ordering information Package &Width -75 AS7C252MNTF18A-75TQC TQFP x18 AS7C252MNTF18A-75TQI Note: Add suffix ‘N’ to the above part numbers for Lead Free Parts (Ex. AS7C252MNTF18A-85TQCN) Part numbering guide AS7C Alliance Semiconductor SRAM prefix 2. Operating voltage 2.5V 3. Organization Meg 4. NTF = No Turn-Around Delay. Flow-through mode 5 ...

Page 18

... Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use. AS7C252MNTF18A ® Copyright © Alliance Semiconductor All Rights Reserved Part Number: AS7C252MNTF18A Document Version: v 1.1 ...

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