bs62lv1025sti ETC-unknow, bs62lv1025sti Datasheet
bs62lv1025sti
Manufacturer Part Number
bs62lv1025sti
Description
Very Power/voltage Cmos Sram 128k
Manufacturer
ETC-unknow
Datasheet
1.BS62LV1025STI.pdf
(11 pages)
R0201-BS62LV1025
• Vcc operation voltage : 4.5V ~ 5.5V
• Very low power consumption :
• High speed access time :
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE2, CE1, and OE options
PIN CONFIGURATIONS
Brilliance Semiconductor Inc
FEATURES
PRODUCT FAMILY
Vcc = 5.0V
-55
-70
BS62LV1025SC
BS62LV1025TC
BS62LV1025STC
BS62LV1025PC
BS62LV1025JC
BS62LV1025DC
BS62LV1025SI
BS62LV1025TI
BS62LV1025STI
BS62LV1025PI
BS62LV1025JI
BS62LV1025DI
PRODUCT
BSI
VCC
FAMILY
CE2
A11
A13
A15
A16
A14
A12
WE
NC
A9
A8
A7
A6
A5
A4
55ns (Max.) at Vcc = 5.0V
70ns (Max.) at Vcc = 5.0V
GND
DQ0
DQ1
DQ2
A16
A14
A12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
NC
A7
A6
A5
A4
A3
A2
A1
A0
0.4uA (Typ.) CMOS standby current
C-grade : 35mA (Max.) operating current
I- grade : 40mA (Max.) operating current
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
BS62LV1025SC
BS62LV1025SI
BS62LV1025PC
BS62LV1025PI
BS62LV1025JC
BS62LV1025JI
BS62LV1025TC
BS62LV1025STC
BS62LV1025TI
BS62LV1025STI
-40
TEMPERATURE
+0
OPERATING
O
Very Low Power/Voltage CMOS SRAM
128K X 8 bit
O
C to +70
C to +85
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
O
VCC
A15
CE2
WE
A13
A8
A9
A11
OE
A10
CE1
DQ7
DQ6
DQ5
DQ4
DQ3
O
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
C
C
. reserves the right to modify document contents without notice.
OE
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
GND
DQ2
DQ1
DQ0
A0
A1
A2
A3
4.5V ~ 5.5V
4.5V ~ 5.5V
1
RANGE
Vcc
Vcc= 5.0V
SPEED
55 / 70
55 / 70
The BS62LV1025 is a high performance, very low power CMOS
Static Random Access Memory organized as 131,072 words by 8 bits
and operates from a wide range of 4.5V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current of
0.4uA and maximum access time of 55ns in 5V operation.
Easy memory expansion is provided by an active LOW chip
enable (CE1), an active HIGH chip enable (CE2), and active LOW
output enable (OE) and three-state output drivers.
The BS62LV1025 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS62LV1025 is available in DICE form, JEDEC standard 32 pin
(ns)
1
450mil Plastic SOP, 300mil Plastic SOJ, 600mil Plastic DIP,
8mmx13.4mm STSOP and 8mmx20mm TSOP.
DESCRIPTION
BLOCK DIAGRAM
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
CE2
A12
A14
A16
A15
A13
A11
CE1
Vdd
Gnd
WE
OE
A6
A7
A8
A9
Address
Buffer
STANDBY
(I
Input
Vcc=5.0V
CCSB1
8
Control
3.0uA
5.0uA
8
POWER DISSIPATION
, Max)
20
Output
Buffer
Buffer
Data
Input
Data
Decoder
Row
Operating
Vcc=5.0V
(I
CC
35mA
40mA
8
1024
, Max)
8
BS62LV1025
A5
Address Input Buffer
A4
Column Decoder
Memory Array
Sense Amp
Write Driver
Column I/O
A3 A2 A1 A0 A10
1024 x 1024
SOP-32
TSOP-32
STSOP-32
PDIP-32
SOJ-32
DICE
SOP-32
TSOP-32
STSOP-32
PDIP-32
SOJ-32
DICE
PKG TYPE
1024
128
14
Revision 2.2
April 2001
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