bs62lv2007hi ETC-unknow, bs62lv2007hi Datasheet
bs62lv2007hi
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bs62lv2007hi Summary of contents
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... FAMILY TEMPERATURE O O BS62LV2007HC + BS62LV2007HI - +85 PIN CONFIGURATIONS Brilliance Semiconductor, Inc R0201-BS62LV2007 DESCRIPTION The BS62LV2007 is a high performance , very low power CMOS Static Random Access Memory organized as 262,144 words by 8 bits and operates in a wide range of 2.4V to 5.5V supply voltage. ...
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BSI PIN DESCRIPTIONS Name A0-A17 Address Input CE1 Chip Enable 1 Input CE2 Chip Enable 2 Input WE Write Enable Input OE Output Enable Input DQ0 – DQ7 Data Input/Output Ports Vcc Gnd TRUTH TABLE MODE WE X Not selected ...
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BSI DC ELECTRICAL CHARACTERISTICS PARAMETER PARAMETER NAME Guaranteed Input Low V IL (2) Voltage Guaranteed Input High V IH (2) Voltage I Input Leakage Current IL I Output Leakage Current LO V Output Low Voltage OL V Output High Voltage ...
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BSI AC TEST CONDITIONS Input Pulse Levels Vcc/0V Input Rise and Fall Times 1V/ns Input and Output Timing Reference Level 0.5Vcc AC TEST LOADS AND WAVEFORMS Ω 1269 3.3V OUTPUT OUTPUT 100PF INCLUDING Ω 1404 JIG AND SCOPE FIGURE 1A ...
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BSI SWITCHING WAVEFORMS (READ CYCLE) (1,2,4) READ CYCLE1 ADDRESS D OUT (1,3,4) READ CYCLE2 CE1 CE2 D OUT (1,4) READ CYCLE3 ADDRESS OE CE1 CE2 D OUT NOTES high for read Cycle. 2. Device is continuously selected ...
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BSI AC ELECTRICAL CHARACTERISTICS WRITE CYCLE JEDEC PARAMETER PARAMETER NAME NAME t t AVAX E1LWH AVWL AVWH WLWH WHAX WR1 t t E2LAX WR2 t ...
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BSI (1,6) WRITE CYCLE2 ADDRESS CE1 CE2 WE D OUT D IN NOTES must be high during address transitions. 2. The internal write time of the memory is defined by the overlap of CE1 and CE2 active and ...
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BSI ORDERING INFORMATION BS62LV2007 X X Note: BSI (Brilliance Semiconductor Inc.) assumes no responsibility for the application or use of any product or circuit described herein. BSI does not authorize its products for use as critical components in any application ...