vrs51c1000 Ramtron Corporation, vrs51c1000 Datasheet - Page 24

• Manufacturer Part Number: vrs51c1000
• Description: Versa 8051 Mcu With 64kb Of Iap/isp Flash
• Manufacturer: Ramtron Corporation

bit register), it causes the UART’s receive controller
block to perform one last shift operation: to set RI and
to load SBUF and RB8. The signal to load SBUF and
RB8, and to set RI, will be generated if, and only if, the
following conditions are met at the time the final shift
pulse is generated:
If both conditions are met, the stop bit goes into RB8,
the 8 data bits go into SBUF, and RI is activated. If one
of these conditions is not met, the received frame is
completely lost. At this time, whether the above
conditions are met or not, the unit goes back to
searching for a one to zero transition in RXD.
UART Operation in Mode 2
In Mode 2 a total of 11 bits are transmitted (through
TXD) or received (through RXD). The transactions are
composed of: a Start bit (Low), 8 data bits (LSB first), a
programmable 9
For transmission, the 9
bit of SCON. For example, the parity bit P in the PSW
could be moved into TB8.
In the case of receive, the 9
written into RB8 of the SCON register.
In Mode 2, the baud rate is programmable to either
1/32 or 1/64 the oscillator frequency.
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VRS51C1000
o
o
Either SM2 = 0 or the received stop bit = 1
RI = 0
th
data bit, and one Stop bit (High).
th
data bit comes from the TB8
th
data bit is automatically
F
SMOD
IGURE
Fosc/2
Write to
SBUF
÷2
0 1
18: S
RXD
1-0 Transition
Sample
Detector
ERIAL
÷16
1
P
ORT
D
S
CLK
Start
Detector
LOAD SBUF
÷16
M
Stop
Start
TX Clock
Bit
Q
ODE
RX Clock
Control
2 B
ZERO DETECTOR
LOCK
TX Control Unit
RX Control Unit
Internal Bus
D
TI
RI
Internal Bus
IAGRAM
SBUF
SBUF
9-Bit Shift Register
Shift
page 24 of 48
Serial Port
Interrupt
Shift
Send
Data
SBUF
SHIFT
READ SBUF
Load
TXD