lv8042lg Sanyo Semiconductor Corporation, lv8042lg Datasheet
lv8042lg
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lv8042lg Summary of contents
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... Ordering number : ENA0004A LV8042LG Overview The LV8042LG is Motor driver 7ch single-chip for DSC. Features • Micro-step driven stepping motor driver×2 • PWM driven forward/reverse motor driver (changeover to the micro-step driving stepping motor driver 1ch possible) × 2 • PWM driven forward/reverse motor driver×2 • ...
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... Logic pin input current Logic input “H” level voltage Logic input “L” level voltage Note: * Design target value. These items are not tested. LV8042LG Conditions 1ch/2ch/3ch/4ch/5ch/6ch/7ch Pulse width<10ms, ty≤20% 1ch/2ch/3ch/4ch/5ch/6ch/7ch Independent IC Mounted on a specified board * Conditions ...
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... Diode forward voltage VD2 Logic input current Logic input “H” level voltage Logic input “L” level voltage LV8042LG Conditions Step 16 (1ch comparing level during initialization) Step 15 (initialization +1) Step 14 (initialization +2) Step 13 (initialization +3) Step 12 (initialization +4) Step 11 (initialization +5) ...
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... Logic input “H” level voltage Logic input “L” level voltage Output constant current I OUT 7 VREF7 output voltage VREF7 LIM7 input current ILIM7 LV8042LG Conditions Step 16 (3ch comparing level during initialization) Step 15 (initialization +1) Step 14 (initialization +2) Step 13 (initialization +3) Step 12 (initialization +4) Step 11 (initialization +5) Step 10 (initialization +6) ...
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... Tlatw Data setup time Tds Data hold time Tdh Maximum SCLK frequency Fclk SCLK D0 DATA STB LV8042LG Conditions (D7, D6)=(0, 0) (D7, D6)=(0, 1) (D7, D6)=(1, 0) (D7, D6)=( =0V (SCLK, DATA, STB =3.3V (SCLK, DATA, STB) SCLK, DATA, STB SCLK, DATA, STB Fclk ...
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... SEN1 6 OUT2A 8 OUT2B 7 SEN2 68 PGND12 67 CLK12 SCLK 27 DATA LV8042LG BOTTOM VIEW 0 0.5 0.4 (0.45) SANYO : FLGA68K(6.0X6.0) 0.73 0.17 80 100 ILV00255 Description STP 1ch/2ch Motor power connection pin STP 1ch OUTA Output pin STP 1ch OUTB Output pin STP 1ch Current sensing resistor connection pin ...
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... VGH GND LV8042LG Description Serial data latch pulse input pin Oscillation frequency setting resistor connection pin PWM/STP 3ch/4ch Motor power connection pin PWM 3ch OUTA Output pin STP 3ch OUTA Output pin PWM 3ch OUTB Output pin STP 3ch OUTB Output pin ...
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... VM7 VM12 SEN2 (NC) SEN3 VM34 SEN4 OUT2A OUT2B OUT3A OUT3B OUT4A LV8042LG OUT6B (NC) (NC) OUT5B OUT5A SEN7 PGND7 PGND56 OUT6A VM56 (NC) (NC): No Connect (NC) ...
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... Block Diagram CPL1 CPL2 VGL CPH1 CPH2 VGH VM56 OUT5A OUT5B PGND56 PWM5 PWM6 OUT6A OUT6B OUT7A OUT7B SEN7 FC7 IN71 IN72 LV8042LG SEN1 OUT1A VM12 OUT1B SEN2 OUT2A OUT2B CLK12 MO SCLK DATA STB R PWM4 PWM3/CLK34 OUT3B OUT3B SEN3 OUT4B VM34 ...
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... F DECAY (DUMMY (DUMMY) OUT ENABLE 2 LV8042LG Mode Nomenclature Functions RG_SELECT 1 Register select 1 RG_SELECT 2 Register select 2 VSEN1_SELECT 1 1ch ⋅ 2ch reference voltage select 1 VSEN1_SELECT 2 1ch ⋅ 2ch reference voltage select 2 VSEN2_SELECT 1 3ch ⋅ 4ch reference voltage select 1 VSEN2_SELECT 2 3ch ⋅ ...
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... STB signal of data latching. Type 2: Forward/reverse (F/R) and excitation mode (MS) settings made during STEP setting are reflected at rise of the next clock of data latching. CLK STB Data latch timing STB timing Type 1 LV8042LG Functions Register select 1 Register select 1 F/R5 Forward/reverse setting DECAY5 Current attenuation mode setting ...
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... SEN resistance. (Example) The output current as shown below flows when the reference voltage is 0.2V, the set current ratio is 100%, and the SEN resistance is 1Ω. I OUT = 0.2V × 100%/1Ω = 200mA LV8042LG Operation mode Charge pump circuit Standby mode ...
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... With RST (D6)= “0”, the output is initialized at rise of STB and the MO output becomes Low. With RST (D6)= “1” subsequently, the position number proceeds at the next CLK input. LV8042LG 1ch ⋅ 2ch STP “L” output at the initialization position of STP 3ch ⋅ 4ch STP ...
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... The output holds the status in the timing of input of step hold. After canceling of step hold, the position No. proceeds in the timing of CLK (rise). As long as the hold status continues, the position No. does not proceed even when (external) CLK is input. LV8042LG Internal CLK logic Internal logic ...
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... LV8042LG θ14 θ13 θ8(2 phase) θ12 (1-2 phases full torque) θ11 θ10 θ9 θ 2ch(4ch) phase current ratio (%) 1-2 phases (%) 1-2 phases full torque (%) 1ch (3ch) 2ch (4ch) 1ch (3ch) 0 100 0 69.56 69.56 100 ...
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... I1 0 -100 (%) 100 I2 0 -100 1-2 Phases Full Torque (D4="0", D3="1", D2="0": CW mode) CLK MO (%) 100 I1 0 -100 (%) 100 I2 0 -100 1-2 Phases Excitation (D4="1", D3="0", D2="0": CW mode) CLK MO (%) 100 I1 0 -100 (%) 100 I2 0 -100 LV8042LG No.A0004-16/29 ...
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... Phases Excitation (D4="1", D3="1", D2="0": CW mode) CLK MO 100 -20 -40 -60 -80 -100 100 - -40 -60 -80 -100 LV8042LG No.A0004-17/29 ...
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... D2 (F/R) data causes changeover of CW and CCW modes; the position No. decreases in the CW mode and increases in the CCW mode. When viewed from the 1ch current, the 2ch current is delayed by 90 degree in phase in the CW mode. When viewed from the 1ch current, the 2ch current is delayed by 90 degree in the CCW mode. LV8042LG (12) θ8(2 phase) (11) ...
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... The symbol “-” such as -(8) in the table indicates that the phase has been reversed. LV8042LG -(8) -(9) -(10) -(11) -(12) -(8) -(16) -(8) 0 4W1-2 phase 1-2 phase Step position after excitation mode changeover 1-2 phases 4W1-2 phase ...
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... Above steps are repeated. Normally, the SLOW (+FAST) DECAY mode is effective in the sine wave increasing direction, the FAST DECAY mode continues till the current is attenuated to the set level, then the SLOW (+FAST) DECAY mode becomes effective subsequently. LV8042LG Set current CHARGE ...
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... This is the frequency for chopping, which is determined by the external resistor for constant-current control. The chopping frequency set by the resistance connected to R pin (pin 32) is shown below. 300 250 200 150 100 The recommended chopping frequency ranges from 50 to 200kHz. LV8042LG VM OFF OFF U2 U1 OUTB OUTA ...
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... Don’t care Note: When the sensing resistor is connected to SEN 3 and 4 pins, the constant-current drive through chopping is made for the set current. Connection of SEN3 and 4 pins to GND allows saturation drive. LV8042LG Operation mode Pin 21 PWM2 system PWM3 CLK34 Output D3 OUT3A ...
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... Since the reference voltage can be made variable (0.2V, 0.134V, 0.1V, 0.066V) with the serial data, the output current can be set from the reference voltage and SEN resistor. (Example) The output current as follows flows when the reference voltage is 0.2V and SEN resistance is 1Ω. I OUT = 0.2V/1Ω = 200mA LV8042LG VM ON OFF ...
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... SEN resistor. (Example) The output current as shown below flows when the reference voltage is 0.2V, the set current ratio is 100%, and SEN resistance is 1Ω. I OUT = 0.2V × 100%/1Ω = 200mA LV8042LG Operation mode Charge pump circuit Standby mode ...
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... D0=1, 1) Input ST PWM6 Don’t care Note: Since there is no SEN pin, saturation drive is made. LV8042LG 4ch -100 Output Operation mode D3 OUT5A OUT5B * OFF OFF Note * H L Note * L H CCW (Reverse) ...
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... Since the VREF7 voltage can be made variable (0.2V, 0.134V, 0.1V, 0.066V) with the serial data, short-circuiting the VREF7 pin with the LIM7 pin enables varying the reference voltage. Input of the voltage obtained by dividing VREF7 with the resistor can produce any arbitrary reference voltage (0.2V or less). LV8042LG Output Mode OUT7B ...
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... Note 2: A 1Ω resistor is attached for each of the SEN pin registers. This sets an output of 200mA when the current ratio is 100%. Note 3: Set the LIM7 reference voltage by short-circuiting VREF7 (or dividing with resistance) before input or by applying the voltage from the outside. LV8042LG LV8042LG 1Ω ...
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... Note 4: To drive STM, serial data must be input for each excitation (phase changeover) Application (2) ⋅ ⋅ ⋅ DCM (Double output capacity) 3.3V PWM 0V Note 5: Short-circuit each input/output. (When short-circuiting, be sure to connect OUT5A and OUT6A, OUT5B and OUT6B correctly.) Application (3) ⋅ ⋅ ⋅ VCM 3.3V 0V 3.3V 0V LV8042LG 33 PWM5 34 PWM6 ...
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... SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of April, 2007. Specifications and information herein are subject to change without notice. LV8042LG No.A0004-29/29 PS ...