74HCT00N,652 NXP Semiconductors, 74HCT00N,652 Datasheet - Page 10

• Manufacturer Part Number: 74HCT00N,652
• Description: IC GATE NAND QUAD 2INPUT 14DIP
• Manufacturer: NXP Semiconductors
• Series: 74HCTr

Specifications of 74HCT00N,652

• Number Of Circuits: 4
• Package / Case: 14-DIP (0.300", 7.62mm)
• Logic Type: NAND Gate
• Number Of Inputs: 2
• Current - Output High, Low: 4mA, 4mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Through Hole
• Product: NAND
• Logic Family: 74HCT
• Propagation Delay Time: 10 ns
• Maximum Operating Temperature: 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: -40 C
• Logical Function: NAND
• Number Of Elements: 4
• High Level Output Current: -4mA
• Low Level Output Current: 4mA
• Operating Supply Voltage (typ): 5V
• Operating Temp Range: -40C to 125C
• Package Type: PDIP
• Number Of Outputs: 1
• Technology: CMOS
• Mounting: Through Hole
• Pin Count: 14
• Operating Temperature Classification: Automotive
• Quiescent Current: 40uA
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-1499-5; 74HCT00N; 933668880652

NXP Semiconductors
Fig 10. Package outline SOT337-1 (SSOP14)
74HC_HCT00
Product data sheet
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
UNIT
mm
VERSION
OUTLINE
SOT337-1
max.
A
2
0.21
0.05
A
1
Z
14
1
1.80
1.65
A
y
2
IEC
e
pin 1 index
0.25
A
3
D
0.38
0.25
b
p
All information provided in this document is subject to legal disclaimers.
b
0.20
0.09
MO-150
JEDEC
p
c
8
7
REFERENCES
Rev. 5 — 25 November 2010
D
6.4
6.0
w
0
(1)
M
E
5.4
5.2
(1)
c
JEITA
scale
2.5
0.65
e
H
7.9
7.6
A
E
2
A
5 mm
1.25
1
L
1.03
0.63
L
E
H
p
74HC00; 74HCT00
E
detail X
0.9
0.7
Q
L
L
p
PROJECTION
Q
EUROPEAN
0.2
v
(A )
3
Quad 2-input NAND gate
A
0.13
w
θ
A
0.1
© NXP B.V. 2010. All rights reserved.
X
y
v
ISSUE DATE
M
99-12-27
03-02-19
A
Z
1.4
0.9
(1)
SOT337-1
8
0
θ
o
o
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