am27c128-200dib Advanced Micro Devices, am27c128-200dib Datasheet

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am27c128-200dib

Manufacturer Part Number
am27c128-200dib
Description
112db 192khz 24-bit Sch Dac
Manufacturer
Advanced Micro Devices
Datasheet
Am27C128
128 Kilobit (16 K x 8-Bit) CMOS EPROM
DISTINCTIVE CHARACTERISTICS
GENERAL DESCRIPTION
The Am27C128 is a 128-Kbit, ultraviolet erasable pro-
grammable read-only memory. It is organized as 16
Kwords by 8 bits per word, operates from a single +5 V
supply, has a static standby mode, and features fast
single address location programming. Products are
available in windowed ceramic DIP packages, as well
as plastic one time programmable (OTP) PDIP and
PLCC packages.
Data can be typically accessed in less than 45 ns, al-
lowing high-performance microprocessors to operate
without any WAIT states. The device offers separate
Output Enable (OE#) and Chip Enable (CE#) controls,
BLOCK DIAGRAM
Fast access time
— Speed options as fast as 45 ns
Low power consumption
— 20 µA typical CMOS standby current
JEDEC-approved pinout
Single +5 V power supply
100% Flashrite™ programming
— Typical programming time of 2 seconds
10% power supply tolerance standard
FINAL
A0–A13
Address
Inputs
PGM#
OE#
CE#
Output Enable
Chip Enable
Prog Logic
V
V
V
Decoder
Decoder
CC
SS
PP
and
Y
X
thus eliminating bus contention in a multiple bus micro-
processor system.
AMD’s CMOS process technology provides high
speed, low power, and high noise immunity. Typical
power consumption is only 80 mW in active mode, and
100 µW in standby mode.
All signals are TTL levels, including programming sig-
nals. Bit locations may be programmed singly, in
blocks, or at random. The device supports AMD’s
Flashrite programming algorithm (100 µs pulses), re-
sulting in a typical programming time of 2 seconds.
Latch-up protected to 100 mA from –1 V to
V
High noise immunity
Versatile features for simple interfacing
— Both CMOS and TTL input/output compatibility
— Two line control functions
Standard 28-pin DIP, PDIP, and 32-pin PLCC
packages
CC
+ 1 V
Data Outputs
DQ0–DQ7
131,072
Buffers
Bit Cell
Output
Gating
Matrix
Y
Publication# 11420
Issue Date: May 1998
Rev: E Amendment/0
11420E-1

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am27c128-200dib Summary of contents

Page 1

... Flashrite™ programming — Typical programming time of 2 seconds GENERAL DESCRIPTION The Am27C128 is a 128-Kbit, ultraviolet erasable pro- grammable read-only memory organized as 16 Kwords by 8 bits per word, operates from a single +5 V supply, has a static standby mode, and features fast single address location programming ...

Page 2

... V CC PGM# (P#) A13 A11 A4 A3 OE# (G#) A2 A10 (E#) A0 DQ7 NC DQ6 DQ0 DQ5 DQ4 DQ3 11420E-2 LOGIC SYMBOL 14 Am27C128 -255 -120 -150 -200 120 150 200 120 150 200 PLCC A11 ...

Page 3

... AM27C128 -45 D DEVICE NUMBER/DESCRIPTION Am27C128 128 Kilobit ( 8-Bit) CMOS UV EPROM Valid Combinations AM27C128-45 DC, DCB, DI, DIB AM27C128-55 AM27C128-70 AM27C128-90 AM27C128-120 DC, DCB, DI, DIB, DE, DEB AM27C128-150 AM27C128-200 AM27C128-255 DC, DCB, DI, DIB OPTIONAL PROCESSING Blank = Standard Processing B TEMPERATURE RANGE C = Commercial ( + Industrial (– ...

Page 4

... AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the following: AM27C128 -55 P Valid Combinations AM27C128-55 AM27C128-70 AM27C128-90 AM27C128-120 JC, PC, JI, PI AM27C128-150 AM27C128-200 AM27C128-255 4 C OPTIONAL PROCESSING Blank = Standard Processing TEMPERATURE RANGE C = Commercial ( + Industrial (– +85 C) PACKAGE TYPE P = 28-Pin Plastic DIP (PD 028) ...

Page 5

... To accommodate multiple memory connections, a two-line control function provides: Low memory power dissipation, and Assurance that output bus contention will not occur. CE# should be decoded and used as the primary de- vice-selecting function, while OE# be made a common Am27C128 0.25 V and PGM# LOW will program , and V between 12.5 V and 13 address line A9 ...

Page 6

... voltage during programming. PP Am27C128 for each eight devices. The loca Outputs OUT High High High ...

Page 7

... V to +5. for ± 10% devices . . . . . . . . . +4. +5. Operating ranges define those limits between which the func- tionality of the device is guaranteed. to –2 2.0 V for periods up to –2.0 V for SS Am27C128 ) . . . . . . . . . . . + .– + .– +125 ...

Page 8

... CE 0 CE and removed simultaneously or after 0.5 V, which may overshoot –75 –50 – 11420E-5 Figure 2. Typical Supply Current vs. Temperature Am27C128 Min Max 2.4 0.45 2 0.5 CC –0.5 +0.8 1.0 C/I Devices 1.0 E Devices 5.0 25 1.0 100 100 applied ...

Page 9

... Output timing measurement reference levels 11420E-7 2.4 V 1.5 V 0.45 V Output Note: For C = 100 pF. L INPUTS Steady Changing from Changing from Does Not Apply Center Line is High Impedance State (High Z) Am27C128 -45, -55, All -70 others 1 TTL gate L 30 100 20 0.0–3.0 0.45–2.4 1.5 0.8, 2.0 1.5 0.8, 2.0 2 ...

Page 10

... ACC (Note 1) after the falling edge of the addresses without impact CDV028 Test Conditions Typ OUT Am27C128 Am27C128 -55 -70 -90 -120 -150 -200 -255 120 150 200 250 120 150 200 250 ...

Page 11

... BSC SIDE VIEW 15 .530 .580 14 SEATING PLANE .015 .014 .060 .022 Am27C128 DATUM D .700 CENTER PLANE MAX 94 105 .300 BSC .600 BSC END VIEW 16-000038H-3 CDV028 DF10 3-30-95 ae .600 .625 .008 .015 .630 ...

Page 12

... TOP VIEW REVISION SUMMARY FOR AM27C128 Revision E Global Changed formatting to match current data sheets. Trademarks Copyright © 1998 Advanced Micro Devices, Inc. All rights reserved. AMD, the AMD logo, and combinations thereof are trademarks of Advanced Micro Devices, Inc. ...

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