ak4562 AKM Semiconductor, Inc., ak4562 Datasheet - Page 16

• Manufacturer Part Number: ak4562
• Description: Low Power 20bit Codec With Pga
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
n Register Map
n Register Definition
Input Select
Mode Control 1
MS0031-E-00
Addr
Addr
Addr
00H
01H
02H
03H
04H
00H
01H
All registers are reset at PDN = “L”, then inhibits writing to all registers.
LIN2-1:
RIN2-1:
PM3-0:
PM3-0 can be partly powered-down by ON/OFF of PM3-0. When PDN pin goes “L”, all circuit in the AK4562 can
be powered-down in no relation to PM3-0. When PM3-0 goes all “0”, all circuit in the AK4562 can be also
powered-down. However, the contents of control registers are held.
In case of PM1 = “1” or PM2 = “1”, MCLK is not stopped.
In case of PM0 = “1” or PM3 = “1”, the powered-up circuit does not need MCLK. However, zero crossing detection
can not operate in this case.
Register Name
Input Select
Mode Control 1
Mode Control 2
Input Analog PGA Control
Output Analog PGA Control
Register Name
Input Select
Register Name
Mode Control 1
RESET
RESET
Select ON/OFF of Rch input. (0: OFF, 1: ON)
Power Management (0: Power down, 1: Power up)
Select ON/OFF of Lch input. (0: OFF, 1: ON)
PM0:Power control of IMIX and IPGA
PM1:Power control of ADC
PM2:Power control of DAC
PM3:Power control of OPGA
MONO1
ZEOP
ZEIP
D7
D7
D7
0
0
0
0
0
0
MONO0
OPGA6
IPGA6
D6
D6
D6
0
0
0
0
0
0
- 16 -
OPGA5
IPGA5
ZTM1
D5
D5
D5
0
0
0
0
0
0
OPGA4
IPGA4
ZTM0
D4
D4
D4
0
0
0
0
0
0
OPGA3
IPGA3
DEM1
RIN2
RIN2
PM3
PM3
D3
D3
D3
0
1
OPGA2
IPGA2
DEM0
RIN1
RIN1
PM2
PM2
D2
D2
D2
1
1
OPGA1
IPGA1
LIN2
LIN2
DIF1
PM1
PM1
D1
D1
D1
0
1
[AK4562]
OPGA0
2000/05
IPGA0
LIN1
LIN1
DIF0
PM0
PM0
D0
D0
D0
1
1